networkZONE Products for the week of November 18, 2002
AMD says…
Slim WLAN - AMD's 802.11b WLAN Chip Set Contains Blueprint
For Migration To SoCs
Questions Remain About Unusual Architecture's Performance
AMD is now sampling its AMD AlchemySolutions Am1772Wireless LAN chipset
and a mini-PCI card reference design kit (RDK). A revolutionary two-chip
802.11b wireless Local Area Network (WLAN) solution with next-generation
architecture, the Am1772 chipset will provide customers the building blocks
for an outstanding long-term wireless strategy. Customers who use the Am1772
chipset in their laptop computer, handheld computer or other portable computing
device will be able to significantly lower their system cost, provide longer
battery life, and lower host CPU utilization--the amount of CPU processing
power needed to support WLAN connectivity. Widely available sampling of
the Am1772 chipset and RDK is scheduled for this month and AMD plans production
availability in Q1 2003.
"Collaborating with our customers and identifying their needs led our design team to create the remarkably innovative Am1772 chipset and a mini-PCI card reference design kit, a high-integration, low-power, high-performance solution," said Dr. William Edwards, AMD's vice president and general manager for the Personal Connectivity Solutions Group. "This will be AMD's bold first step into the wireless market, and the first of several wireless products we plan to introduce over the next 12 months. Ultimately, we intend to continue to provide industry-leading wireless technology for our customers, and to integrate that technology into our MIPS technology-based AMD Alchemy Solutions system-on-a-chip (SOC) processors."
Leading Wireless LAN card vendors have already expressed support for the Am1772 WLAN chipset. "The Am1772 WLAN chipset will offer significant benefits to us as a customer," said Steven Chang, wireless R&D manager of Ambit. "We see this as a real breakthrough in design and a clear indication that AMD has a well-planned strategy and is a serious player in wireless 802.11b solutions."
"AMD 's architectural design is impressive and will offer our customers a reliable, robust solution," said Chaney Wang, director of R&D division at Askey. "Their reference design and use of auto-calibration technology will allow us to bring products to market quickly while reducing both manufacturing costs and test time."
"Judging on the most important metrics - system costs, power efficiency, processor utilization, reception sensitivity, transmitting power and footprint - AMD will clearly offer an industry-leading solution with the Am1772 WLAN chipset," said James Hu of Z-Com, senior marketing and sales director. "Also, AMD's solution is well-positioned for future chipset integration."
About the Am1772 WLAN chipset
Designed to enable customers to make easy transitions to future 802.11 medium
access controller (MAC) enhancements, the Am1772 wireless chipset is a Complementary
Metal-Oxide Semiconductor (CMOS) solution that utilizes baseband processor
and a MAC, with a descriptor-based direct memory access (DMA) host-Iinterface.
The CMOS design helps reduce power consumption for the mini-PCI-based reference
design to 134 mA while receiving and 232mA while transmitting - a significant
improvement over competing designs resulting in increased battery life in
mobile applications. In addition, the highly integrated solution reduces
the number of additional components and enables a very compact design.
The Am1772 chipset is comprised of the AMD Alchemy Solutions Am 1770Radio
Frequency transceiver and the AMD Alchemy Solutions Am1771baseband processor
and MAC. The Am1770 transceiver utilizes Direct Down Conversion, which eliminates
the requirement for an Intermediate Frequency (IF) chip. The Am1771 chipset
is an integrated baseband/MAC that features on-chip hardware acceleration
designed to help significantly reduce host CPU load. The use of the baseband
processor and MAC with a descriptor-based DMA architecture also benefits
the customer by enabling lower system costs through the elimination of the
on-chip micro-controller and the associated non-volatile (Flash) memory
and SRAM. The use of auto-calibration technology also reduces the need for
costly and time-consuming system calibration during the manufacturing process.
analogZONE Says . . .
My guess is that when the hoopla subsides, there will be room on the market for between four and six companies (maybe fewer?) to profitably manufacture 802.11 wireless LAN chips. Given this assumption, one could rightfully wonder why AMD is trotting out its own 2.4 GHz 802.11b chip set when there are well over a dozen other contenders already in the market? Actually, there is a two-part answer. First, AMD thinks it has licked some of the difficult problems in delivering a high-performance, low-cost transceiver. More important, they have correctly foreseen the importance of having wireless LAN IP in its stable of cores that will be able to be used in its new line of 'x86- and MIPS-based SoCs that are looking for homes in everything from wireless web pads and residential broadband gateways to telematics systems and game consoles.
This initiative is a wise move for AMD, giving it a potentially large alternate revenue stream to its embattled CPU business. In doing so, I think they are making the best of their recent acquisition of Alchemy Semiconductors, founded by a group of rebel Siliconistas who escaped from DEC. The seasoned design team at the heart of Alchemy is much like a long-running rock band, with a string of hits that include the Alpha and StrongArm processors. Much like the Rolling Stones know how to sell out a 50 k+ seat stadium, the Alchemy team may be the perfect group to realize the potential of merchant SoCs. And the 802.11 IP contained in these new chips may be one of the key elements to their success.
AMD is not trying to attack the desktop or laptop, they are aiming to build complex SoCs with MIPS and X86 processors to power web pads, handhelds, set-top boxes, high-powered residential gateways, and other non-traditional platforms where Intel has less of a stranglehold. I'd expect the baseband to end up in a core on an SoC within 6-9 months, leaving a $4-$6 RF chip outside and a handful of discretes. If the radio works as promised, it's a sweet solution. National tried this, and it looked like a good idea, but the CPU core they purchased was too wimpy and they did not have the digital cores to really build large highly integrated systems. AMD instead, has to buy its mixed-signal expertise - we'll see how that goes.
But until their SoC business matures a bit, their transceiver must be judged as a chip set, so it's time to pop the lid and see if we can get a sense of what they are doing. While the details I was supplied are annoyingly sketchy, it's apparent that the chip set has an interesting architecture. For one thing, the radio employs a direct-conversion architecture that also eliminates all but one off-chip passive in the AFE.
Unlike some other CMOS 802.11 radios, AMD has wisely chosen to employ an external PA chip, something that may cost a few cents more, but saves the designer and manufacturer countless headaches down the line, as well as guaranteeing top performance. The reference design calls for an Infineon PA, but at first glance it looks like you can swap in something from RF Solutions, SiGe, TriQuint, or other vendors as well.
Another unique aspect of the AMD radio is the digital interface between baseband and MAC, instead of the traditional analog I/Q signals. There are some significant advantages offered by this in terms of making the signal path less susceptible to noise, and allowing some digital filtering to be done ahead of the actual symbol recovery in the baseband unit. There is also a market advantage for AMD because this non-standard interface "locks" the chip set together, making it difficult to use a competitor's receive chain. On a more practical note, the interface makes a good break point, allowing the baseband to be easily integrated into a SoC, effectively cutting the solution cost nearly in half.
And speaking of cost-cutting, AMD has come up with a nice way to eliminate the microcontroller that traditionally handles the baseband chip's control tasks. Compact chunks of hardwired logic perform all of the actual real-time MAC functions, but the chip is dependent on host-based protocol controller software for higher-layer MAC functions and setting up the data transfers to the chip. While it does place some burden on the host CPU, the chip does employ DMA circuitry for fast efficient transfers, and significantly less processing load than a simple slave arrangement where the CPU must spoon-feed the transceiver. AMD rightly feels that the few MIPS the host controller steals is more than offset by the cost savings realized by cutting out the MPU silicon.
The result of all of this is a very compact reference design for a complete 802.11b radio, taking up less than half of a compact PCI card. The design incidentally, was vetted by a Taiwanese manufacturer for easy manufacturability.
Despite all the good things chip set has going for it, I still have some nagging concerns. For one thing, it's unclear to me whether AMD has avoided the many pitfalls of direct conversion architectures (zero-offset, unwanted mixing products, and sensitivity to non-linearities in the mixer stage), and was not comforted by the vague answers I got during my briefing. They claim that these problems are handled by a self-calibration system that tunes the transceiver's filters against an internal bandgap reference to compensate for thermal drift and process variation. In addition to keeping the direct conversion mixer products clean, it's supposed to eliminate costly calibration during final assembly.
I also did not get any good details on the transmitter architecture, but the chip set's 750 mW (maximum) power draw during transmit is a bit high for my taste, as is a 440 mW receive power draw - especially in a PDA or cell phone where batteries run on the small side. Of course this is the maximum power rating, but I don't know what a more typical number might be much less, but I was not able to find out.
Likewise, the details my briefer could supply about this intriguing self-calibration technology used in the transceiver were thin at best.
Another thing that bothered me is that the current chip supports only the 2.4 GHz 11-Mbit/s.802.11b mode. The 54-Mbit/s 802.11.g mode, and the 5-GHz a mode will be much more demanding of the direct-conversion architecture, especially if it remained in CMOS. I also wondered how many chips an a/b/g solution will entail. AMD said that their a solution will be in CMOS, but would not comment further other than to say we should expect an 802.11a/b/g solution in the 2nd half of '03.
Since I was not getting straight answers from the marketing folks who briefed me, Dan Pickens, the product group marketing manager kindly offered to pass on a few questions to his technical staff. To my disappointment, the results (posted below) were not much more informative than the original answers I received. Consequently, I am still uneasy about how closely the chip will match the claims made for it. I'll let you read them and judge for yourself.
Q1) Direct-conversion
receivers have several inherent problems, including
linearity, mixing byproducts, and dc offset. How do you get around these
in
a CMOS design? And can you do it for the more demanding 802.11g signals?
A) These problems are overcome by a variety of proprietary control and correction techniques. We believe that we can apply these same techniques successfully for next-generation systems including 802.11a and g.
Q2) Will you
use the same architecture for the 5 GHz 802.11a radio? and how
will you deal with running the chip at the edge of the CMOS process'
frequency capabilities?
A) We do plan to use the same architecture, and we believe that our design techniques, combined with current CMOS process technology will allow us to overcome the challenges at 5 GHz.
Q3) Were your power consumption specs (765 mW transmit, 440 mW receive, 350 mW listen, 60 mW standby) including the external PA? If it is, could you break down the numbers between the chip and the PA?
A) Power consumption figures on our MiniPCI reference design product brief are for the entire system, where the PA consumes about 65% of the power in transmit mode. The Am1772 chip set product brief has power consumption numbers for the individual chips.
Q4) If you are filtering at the baseband, I would imagine the passives involved would be relatively large at least in comparison to RF filters. How large are they really, and how do you implement them with no external components? Do you do some of the filtering during the digitization process to get around some of these issues?
A) I can't comment on actual component values, but the baseband filters in the RF section are completely integrated. These work in conjunction with filtering algorithms in the BB.
Sadly, AMD's responses did not really answer my questions, but only provided tantalizing glimpses of what might be a very good product. Without sufficient information, it's hard to feel fully confident that AMD's parts will deliver on all their promises of performance, and I think at this stage of the game performance is as, or more important than saving a dollar or two on the chip set's BOM. This skepticism is tempered by the fact that AMD has a very solid record of delivering solid products that keep its promises, and the reputation of the German RF design group that did much of the radio work. Because of this, my vapor index rating is a saltshaker lower than the information I got would normally warrant.
Product brief for reference design
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