networkZONE Products for the week of September 18, 2006
AMCC Says…
10GBASE-LRM IC Brings High-Speed Transmission To 300
m FDDI-Grade Legacy Fiber
Applied Micro Circuits Corp. has announced availability of the QT2025, a highly integrated physical layer IC (PHY) for 10GBASE-LRM applications. The 10GBASE-LRM standard targets the large base of installed multi-mode fiber (MMF) in corporate backbones and provides a cost-effective way to convert these links from speeds as low as 100Mbits/s to 10Gbits/s operation.
Over 90 percent of the installed fiber in enterprise backbones is legacy MMF. While the IEEE802.3aq 10GBase-LRM standard specifies 220m as the target fiber length, the QT2025 is designed to operate over 300m of FDDI-grade fiber which increases the backbone coverage by close to 20 percent.
"Intermediate-reach 10GE links are becoming critical, but the technology is still too expensive," said Mitch Kahn, AMCC Vice President of Marketing, Transport Product Line. "Robust and cost-effective LRM solutions will be key drivers of the adoption of 10GE in the corporate backbone and enterprise market. The QT2025 addresses these requirements with its high-performance, high-integration architecture."
Last month AMCC announced the QT2035S, a 10G Ethernet PHY designed for the emerging small form factor SFP+ module market. SFP+ is regarded as the most cost-effective and low-power form factor for high-speed enterprise connectivity. According to Kahn, "In the long term, enterprise switches and NIC cards will move towards solutions based on SFP+. However, an estimated 80 percent of installed equipment is still utilizing the larger XENPAK, XPAK and X2 modules, and this trend is expected to continue over the next 12 to 18 months. Our new QT2025 device is optimized for this market."
The introduction of the QT2025 reinforces the commitment AMCC made to the enterprise Ethernet market when it recently acquired Quake Technologies. Already a world leader in processing, storage and transport products, the Quake acquisition positioned AMCC as the market-share leader in the 10G Ethernet PHY space.
About The QT2025
The QT2025 integrates 10Gbit/s serial-to-XAUI Ethernet processing with high-performance
electronic dispersion compensation (EDC). The EDC engine uses a novel architecture
that optimizes the link performance to different fiber impulse responses
and adapts to modal changes in the fiber. The PHY can be field upgraded
via a built-in microprocessor in order to support standards changes, new
standards or to optimize performance.
analogZONE Says . . .
This variant on the QT2035S (reviewed here June 2006) 10GbE transceiver is a nice way to kick off AMCC's acquisition of Quake and another example of why the company is such a good complement to their overall product mix. As the release above explains so well, the transceiver targets the perceived market for low-cost long-reach multimode (LRM) optical modules that will be able to support 10GbE connections across the existing low-quality FDDI-grade fiber that lurks within many of today's buildings.
Instead
of driving the lower-cost single-mode FC modules for short-haul 10GbE, the
QT2025's interface is designed to drive 10 Gbit/s transmitter optical subassemblies
(TOSAs) and receiver optical subassembly (ROSAs) that are typically embedded
into 10 Gbit/s small-form-factor-pluggable (XFP) MSA modules (see Fig. 1).
Most of the QT2025 innards are identical to the
QT2035S from which it derives, with a few notable exceptions. Like the earlier
chip, its system-side connection sports a legacy XAUI interface along with
a programmable equalization scheme to help cope with imperfect chip-to-chip
connections (see Fig. 2). But since the ROSA and TOSA are co-located with the
chip in an optical module, the receive EQ is simpler and there is no need
for transmit pre-emphasis -- something that accounts for some of the lower
power consumption the QT2025 displays. Another difference is that since
the QT2025 is a LAN-only device, it does not have the WIS (WAN Interface
Sublayer) logic that allows the QT2035S to bridge between Ethernet and SONET
connections. 
The 10GbE transceiver shares most, or all of the QT2025 genetic code, including a wide dynamic range on both the Tx/Rx that enables it to support most ROSA/TOSA products currently on the market. The transmitter has a simple programmable pre-distortion equalizer which relies on weighted tables programmed into its on-chip registers. These values can be determined empirically but the chip's on-board adaptation processor can also be programmed to use the receive slicer (horizontal and vertical) circuitry to analyze the link and provide them automatically.
On the receive side, the EDC engine employs a mixed-signal FFE/DFE equalizer that is pretty much identical to the one used in the QT2035s. It receives its parameters from the adaptation processor which are calculated based on inputs from the receive eye monitor and BER measurements (see my review of the QT2035S for a few more details on this). It's interesting to note that this equalization scheme is designed to meet the more stringent Cambridge stressor parameters for tolerance of smearing attenuation and distortion than current 802.3aq LRM standard. This is one of the biggest reasons that the QT2025 should be able to achieve its 300 m reach that exceeds the LRM spec by 20%.
This LRM device also shares its XFP counterpart's ability to turn its receiver into a digital sampling scope. The on-chip processor can be programmed to sweep its receive slicers across time and voltage to provide you with a digitized image of the receive eye via one of the device's I/O ports. While not completely unique (Accelerant/Synopsys 5-Gbit/s PAM SerDes transceiver had it years ago), it is a rare and extremely useful feature for design and development -- not to mention manufacturing test and field debug. I also suspect that the right combination of firmware and API could eventually enable an application that lets a network manager look at a particular node's signal quality directly from their NOC console.
AMCC makes integrating the QT2025 into your deign easy with a ready-to-run evaluation board, driver software, a GUI interface, and Gerber files for quick PCB layout. Since AMCC has a one of the widest selection of packet processors and transport devices in the industry, I'd expect to see more complex evaluation boards that team these transceivers with AMCC's other product lines. When I asked whether we'd see the QT2025 or one of the other transceivers featured as part of a complete application-specific reference design Quake said they had no firm plans but I'd expect that to change some time soon.
The QT2025's high levels of integration and use of on-chip EDC should help drive 10GbE prices from the 7x GbE cost differential we see today towards the 2x - 4x cost factor normally required to drive mainstream market acceptance. I imagine that products based on the newer, smaller SFP/SFP+ form factors will dominate the 10GbE market five or six years from now, but it's likely that LRM upgrade products in larger form factor modules will find homes in the hundreds of thousands of XENPAK, XPAK and X2 sockets already in the field. Their ability to re-use existing multi-mode fiber infrastructure at a low price point makes them a good candidate to begin to soak up a large chunk of the market currently enjoyed by lower-cost 850 nm SR modules and parallel 1310-nm LX-4 transceivers -- perhaps as soon as late 2007.
The QT2025 is sampling now in a 13 x 13 BGA package. Preliminary measurements put maximum power consumption at 1.2 W. Full production is expected in late Q1 2007. Quake has not formally announced a price for the QT2025 but was willing to go on record that it will be the same as the QT2035S. When I reviewed the QT2035S Quake would not give me a hard price but was willing to hint at numbers that were about $10 higher than a standard SFP PHY ($50 - $55).
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