networkZONE Products for the week of August 1, 2005
Cortina Systems Says…
Cortina Systems Ethernet Aggregator IC Enables Service
Guarantees For Over-Subscribed Enterprise Switches
New Barcelona Chip Provides Leading Port Density with Advanced
Classification for Oversubscription with Guaranteed Quality of Service
Cortina Systems has announced the Barcelona IC for Ethernet network systems. Designed especially for enterprise switch and router vendors, Barcelona uses advanced classification, deep buffers, and flexible scheduling to enable increased port counts on switches without compromising on service quality. All of Barcelona's 24 multirate Ethernet ports support strict service guarantees, which have become increasingly critical in enterprise networks as voice over IP and other new services are deployed.
"Typically, switch vendors have had to compromise between service quality and cost-effective oversubscription", said Zino Chair, Cortina's vice president of marketing. "The Barcelona IC bridges that gap. Oversubscription can be used to more than double Ethernet port densities, and Barcelona makes this possible with intact service guarantees for critical data."
As voice over IP and other new services become common in enterprise networks, switches must be upgraded to support new performance requirements. Even in a congested network, Barcelona can identify and prioritize critical flows and mark them as high priority with guaranteed bandwidth while storing bulk traffic to prevent packet loss. In addition, with its support for new policing and shaping policies coupled with IPv6 and MPLS functionality, it is also ideal for metro applications where strict service level agreements must be enforced.
Barcelona connects directly to GE optical modules or serially to copper
PHYs, and interfaces with existing packet processors through an industry
standard SPI port, which makes it ideally suited for Ethernet switches,
routers and transport platforms. The IC is implemented in .13 micron CMOS
and combines Cortina's industry-leading expertise in programmable port processing
with advanced manufacturing techniques to enhance services in enterprise
and service provider networks.
analogZONE Says . . .
Cortina's 24-port aggregating Ethernet MAC is not exactly a new concept, but, as we'll see, its attention to efficient priority queuing and offloading of other critical traffic management functionality does provide significant improvements that could help chassis-based enterprise-class Ethernet equipment as well as transport and router products make the best use of the costly backbones that they feed. This is accomplished using some sophisticated "intelligent oversubscription" queuing logic that is normally found deeper in the network at the traffic manager or switch fabric level. In fact, it contains levels of traffic flow management functionality that would have been considered state-of-the-art for an Ethernet switch or even a stand-alone traffic manager a couple of years ago. By moving this intelligence to the edge, Barcelona should be able to offload much of the basic traffic management from the switch/router itself while allowing a 10G connection to support 24 x 1-Gbit/s Ethernet streams with little, or no impact to QoS.
Before we look at the "secret sauce"
behind its oversubscription mechanism, it's probably useful to take a look
at Barcelona's "speeds and feeds." Its business end bristles with
24 SGMII MACs that can drive either a copper PHY or connect directly to
a SFP optical module (see Fig.
1). The design leverages Cortina's experience
with high-speed SerDes to deliver a 24-port device that's got a Belcore-compliant
jitter spec and still only draws, 10 - 12 W worth of power for the entire
device.
The device's upstream connection is a 10G SPI-4.2 (also configurable to SPI-3) interface that enables it to easily connect to a NPU, or other packet processor before going to a switch fabric. It also features internal logic that allows it to connect directly to any VCAT-enabled SONET framer -- a very handy trick for those of you working with EoS designs.
The logic behind the MACs evens out the bursty traffic coming in to its Ethernet ports using a programmable four-level queuing engine and a packet inspection engine that can apply up to 128 rules on packets classified according to L2 through L4 criteria. Its Layer-4 capabilities include classification on TCP/UDP port numbers, and port ranges -- essential for VoIP, video conferencing, and other latency-sensitive services.
Barcelona's 4-layer queuing mechanism allows good traffic segregation, including a separate queue for multicast/broadcast traffic to manage bandwidth and keep packet storms from bringing down vital services. It supports the two rate, three color marker policies defined by the IETF RFC2698, and can be configured to work with a very similar mechanism defined by the Metro Ethernet forum.
Queuing between ports is handled by a modified deficit round robin (MDRR) scheme, which allows you to allocate the bandwidth assigned to a particular priority level among all ports equally, or favor one or more with a larger percentage of the uplink pipe. Within this framework, the scheduler allows you to use any combination of supports Round Robin, Weighted Round Robin, and Strict Priority schemes to allocate bandwidth between different priority levels.
Barcelona can enforce SLAs using its classification, tagging and enforcement capabilities that give it the ability to define CIR and PIR levels on a per-port or per-queue basis. It deletes the guilty packets itself according to strict bandwidth limits or use a "softer" WRED algorithm. If desired, Barcelona can also simply mark packets using either the 802.1p bits or the IP type of service (TOS) field instead of dropping and pass them upstream for further policing later. As the block diagram (Fig. 1, again) indicates, the chip can also tag packets to supporting the MPLS Martini draft, QinQ VLAN (up to 2 tags), and GFP Linear Header protocols.
Unlike other chips of its type, buffering is handled off-chip with up to 5 Mbyte worth of external FCRAMs. While external buffering adds some cost to the solution, it may be a relatively small price to pay for a buffer large enough to keep dropped packets to a minimum in high-congestion applications. Any concerns with extra latency are mostly negated by the FCRAM's wide data path whose inter-chip transfer delays contribute only a fraction of the device's a minimum latency spec of 3 µs.
As
I mentioned before smart oversubscription isn't unique to Cortina's MAC
chip. As far back as 2002, Transwitch was producing its EtherMAC framers which had some basic
buffering and flow-control mechanisms to match and rate-adapt uneven flows
to the steady TDM streams at OC-3 and OC-48 rates. More recently, Ample's Harrier and Vitesse's
VSC7324 devices were introduced, both of which offer comparable capacities
and some basic priority queuing and traffic management functionality. But
the Cortina device has several features that will give it an edge in many
applications, the ability to do L3 and L4 classification (versus competitor's
L2 only), two more priority queues, and a much larger buffer capacity. You
can refer to Fig. 2 for a more comprehensive feature comparison.
Putting this level of intelligence at the network edge offloads an NP or classifier located deeper into the system for better throughput and, in some cases, eliminates the need for the extra silicon altogether. While it may be overkill for some simple applications where the lower-cost Vitesse and Ample parts will continue to shine, the Barcelona MAC's highly-sophisticated traffic management capabilities will make it a natural for QoS sensitive applications such as providing high-density VoIP capabilities in DSLAMs and enterprise equipment while making efficient use of their uplink bandwidth.
Barcelona is currently sampling and pricing in 1000-piece lots is around $240, with substantial discounts for higher volumes.
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