networkZONE Products for the week of June 16, 2003
Motorola Says…
DSP Redefined - Motorola's Smart Baseband Solutions
May Redefine Wireless Infrastructure Design
Reconfigurable Compute Fabric (RCF) Device, Combined with
Next-Generation Motorola DSPs, Helps Reduce Cost and Complexity of 2.5G
and 3G Baseband Processing
Wireless infrastructure vendors face multiple challenges -- from intense
cost pressures to rapidly evolving standards to significant R&D risks
-- in their quest to deliver base station platforms for next-generation
wireless networks. Motorola helps them meet these challenges with its Smart
Baseband Solutions, a comprehensive, system-level baseband processing architecture
designed for 2.5G and 3G base stations. Motorola's MRC6011 Reconfigurable
Compute Fabric (RCF) device and next-generation MSC8126 multicore StarCore
digital signal processor (DSP), in concert with Motorola wireless application
software library modules, offer the underlying silicon and software technology
for Motorola's Smart Baseband Solutions.
The MRC6011 RCF device is engineered to provide an efficient processing solution for a wide range of computationally intensive applications, such as baseband processing for 3G and broadband wireless access systems. Working in tandem with Motorola's MSC8126 StarCore DSP, the MRC6011 RCF device is designed to enable system architects to adapt algorithms and fix bugs before and after deployment, fine-tune baseband architecture and manage partition and load on the fly, design multi-standard wireless platforms, and add advanced capabilities, such as adaptive antenna (AA) and multi-user detection.
Motorola's Smart Baseband Solutions offer the advanced RCF and DSP components, along with library modules and development tools, required to develop scalable and programmable baseband processing systems that accommodate multiple standards, such as Wideband Code Division Multiple Access (WCDMA), Code Division Multiple Access 2000 (CDMA2000), Time Division-Synchronous Code Division Multiple Access (TD-SCDMA) and Enhanced Data rates for GSM Evolution (EDGE). Smart Baseband technology supports system-level flexibility, a consistent design environment for the entire baseband and efficient C and assembly programming. In addition, the technology is based on optimized processor-application mapping to increase capacity, deliver high performance and maintain low-power dissipation per channel.
"RCF technology provides a programmable alternative to more costly ASIC- and FPGA-based baseband system designs," said Will Strauss, president of Forward Concepts. "Today's wireless infrastructure market is undergoing a rapid transition toward 3G technology. During this transition, base station vendors require baseband processing solutions that will help reduce R&D and deployment costs as well as ongoing cost of ownership. RCF is an exciting new approach to meeting these needs and promises to play a prominent role in shaping the future of wireless infrastructure."
"Motorola's Smart Baseband Solutions are designed to provide a flexible, future-proof reconfigurable compute fabric, enabling manufacturers to reduce the total cost and complexity of wireless infrastructure equipment, adapt to evolving wireless standards around the world, and speed time to market," said David Perkins, corporate vice president and general manager of Motorola's Networking and Computing Systems Group. "Motorola is driving the future of high-performance, multicore RCF and DSP technology for the benefit of our wireless base station customers. Motorola's MRC6011 device represents a giant step toward our goal of providing groundbreaking silicon solutions for 3G baseband processing."
About the MRC6011 RCF Device
The MRC6011 device is designed to provide the flexibility of a programmable
DSP solution for baseband processing while approaching the cost-effectiveness,
power consumption and processing capability of a traditional application-specific
integrated circuit (ASIC)-based solution. The MRC6011 combines six RCF cores
into a homogeneous compute node capable of operating at 250 MHz, with a
100 MHz maximum operating frequency for off-core buses. The six-core MRC6011
device is designed to deliver a peak performance of 24 giga multiply-accumulates
per second (GMACS). At 4-bit resolution, the device is capable of performing
at 48 giga complex correlations per second.
The MRC6011 is a highly integrated system-on-chip (SoC) device that comprises two identical and scalable reconfigurable compute (RC) modules. There are three identical RCF cores per module, and each core has a powerful 16-element processing array. The RC controller is an optimized RISC processor designed for efficient C code compilation, and it features instruction and data caches, programmable timers and external general-purpose output lines. Core peripherals include large high-speed buffers, a special-purpose complex correlation unit, and a single- and burst-transfer direct memory access (DMA) controller.
The MRC6011 is manufactured on low-power 0.13-micron CMOS process technology, enabling an internal logic voltage of 1.2V and input/output voltage of 3.3V. Typical power consumption is targeted at less than 3W. The device is offered in a 31 mm x 31 mm Tape Ball Grid Array (TBGA) package.
About the MSC8126 DSP
Motorola's MSC8126 device is planned to be the first in a line of powerful,
multicore StarCore DSPs designed to provide the optimal performance, price
and size per channel to address the programmability, scalability and reconfigurability
requirements of wireless infrastructure. An SoC device, the MSC8126 combines
four StarCore DSP cores, a turbo coprocessor, a Viterbi coprocessor, an
RS-232 serial interface, four time-division multiplexed (TDM) serial interfaces,
32 general-purpose timers, a flexible system interface unit (SIU), an Ethernet
interface and a 16-channel DMA engine that handles independent data transfers.
The MSC8126 device is the industry's most powerful programmable DSP. Its four extended cores are designed to deliver up to 6400 million multiply-accumulates per second (MMACS) of DSP performance at 400 MHz. The four-core MSC8126 device is planned to be available at two core speeds: 350 MHz and 400 MHz.
Supported by a robust set of development tools, Motorola's multicore DSP solution is designed to drive exceptional cost efficiency per voice and data channels for 3G wireless base station applications. The MSC8126 is designed to be code-compatible with Motorola's existing MSC81xx devices, and pin-compatible with the MSC8102 DSP. Motorola plans to manufacture the MSC8126 on its 90 nm process technology, which will enable the device to perform at higher clock speeds.
About Motorola's Software Library Modules
Continuing the tradition of offering comprehensive solutions to its customers,
Motorola plans to release a library of application software modules for
both the MRC6011 and MDC8126 devices. The first version of the library is
targeted at Universal Mobile Telecommunications System (UMTS) applications
with both chip-rate and symbol rate modules. These C-scalable modules are
designed to significantly reduce development and debug time.
analogZONE Says . . .
EDITOR'S NOTE: A word of caution for readers who have difficulty with overly-enthusiastic prose and glowing reviews - this is going to be one of those annoying write-ups which are almost uniformly positive about the product. I apologize in advance for the gushing prose below - it even makes me a little queasy - but I really think that Motorola has done something special here. I'll understand if you need to click away now and find one of my more hard-nosed reviews, or some more substantial material at networkZONE, but if your stomach can stand a few enthusiastic superlatives, please stick with me. Regardless of its commercial potential (of which I think it has lots), you have to simply admire the ingenuity of this device.
After a successful demonstration of its alpha silicon this spring, Motorola is putting the Reconfigurable Compute Fabric (RCF) multiple-processor core technology it acquired from Morphos to work with the MRC6011. Motorola is probably correct in its expectation that this highly-specialized architecture will greatly lower the cost and increase the efficiency of advanced wireless infrastructure equipment. This is based on their observation that signal processing involves two distinctly different types of signal processing tasks. Functions such as correlation and chipping code processing are repetitive MIPS-intensive tasks well-suited for highly-efficient fixed-function arrays while more irregular, complex decision-making tasks, like channel coding and symbol rate processing are better suited for traditional DSP or RISC processors. By splitting up the regular and irregular tasks between the 6011 configurable fixed-function fabric and its formidable StarCore DSP, a wireless base station can use less raw computing power to handle the same number of channels.
The wizards in Austin say that their implementation of Morpho's configurable compute fabric architecture has been optimized for heavy utilization of all on-chip resources. This meant fine-tuning for a particular application - in this case, the baseband section of wireless infrastructure for 3G systems and broadband wireless access (you will need a second device for tasks like echo cancellation.) It happily supports most wireless standards, including European UMTS, North American CDMA 2000, and the new Chinese TD-SCDMA spec.
Sure, multiple processors on a single chip are nothing new - Lord knows we've seen enough of them kicking around the network processor market for the past four years or better. We've even seen various DSP arrays from the likes of Chameleon and MorphICs and a configurable packet processing array from Xelerated, so why have I been so excited about Motorola's reconfigurable DSP processor since I got a good look at it while attending the Smart Networks Developers Forum earlier this spring?
The answer comes in several parts. First, the architecture is very powerful and designed to overcome many of the inefficiencies and bottlenecks found in multi-processor designs. Second, it's reconfigurable - able to select and configure groups of very fast computing elements from its array, and assign each cluster to chew on separate compute-intensive tasks. Third, Motorola has really fine-tuned the architecture and instruction set to attack a specific class of communication tasks in an extremely efficient manner compared to conventional DSPs. Finally, they have overcome many of the programming and application difficulties experienced by multi-processor, and especially configurable-processor, systems.
If you have not had a chance to take a close look at the RCF configurable fabric array architecture, it's worth a few minutes of your time to get an idea of how it works. It's just too much to pack into a review like this but I'll give you a Reader's Digest summary:
The MRC6011 is an array of six processing cores (See Fig. 1) connected via a very flexible, high-speed fabric. Each 250-MHz core has 16 configurable processing elements, plus the instruction and data caches to feed them. Each core (See Fig. 2) has its own RISC engine that handles configuration and management of the cores. Buffers in the array's inputs assure processors are not data starved while the bus is in use by other sub-units. Each of the 16 reconfigurable computing units (RC) has its own 16-bit arithmetic, logical and conditional units, a 16 bit pipelined MAC unit, and a complex correlation unit.
The processor talks to its host, and other processors, via 100-MHz, 16-bit I/O busses, making it easy to hitch the 6011 up to a MSC8126 StarCore or other DSP. Cascading multiple 6011s for additional compute power is accomplished the same way. And if these connections are not fast enough future incarnations of both processors will incorporate RapidIO interfaces.
With a processor that's as weird and complex as the 6100 development tools are as critical to success as the chip itself. To this end, Mot seems to have done a thorough job of building on Morpho's development suite. The result is a good set of unified tools, abstracts, programmer from some of the low-level peculiarities of each CPU. From what I saw in the demo the tools should allow programmers to work in C or assembly most, or all of the time, with code efficiencies approaching that of the HDL used to program an FPGA.
Motorola has taken care to see that the 6011 will have its own niche within the large ecosystem shared by the rest of its development community. They are busy porting the large collection of software, tools, and systems development expertise developed for other chips over to the RCU universe. MetroWerks, Motorola's semi-captive software tools house, will be offering tools based on its StarCore Code Warrior development environment. This means that you'll enjoy a well-provisioned module library, chock-full with protocol stacks and application reference designs from the get-go. What's more, MetroWerks links cleanly to libraries and functions from Mathworks, MatLab, and Simulink.
While much of what the 6011/8126 pairing does can be done in an ASIC or FPGA, they don't have the flexibility and quick turnaround that this configurable/programmable tag team offers. Besides delivering blinding (albeit single-minded) processing power, a reconfigurable system should be able to track evolving standards, and to move processing power to support tasks and services as-needed. And if trouble comes to call users can deploy software patches and diagnostics remotely, instead of with an expensive, time-consuming truck roll.
With working silicon and a formidable library of development tools about the only concern I have is whether the RCF is a fabulous technology looking for an application that may or may not materialize. Given the torpid telecommunications market, I am not absolutely convinced that we'll see the massive deployment of 3G, or even 2.5G infrastructures in large volumes any time soon. Thanks to more rational telecom policies in some Asian and European nations, we'll definitely see some level of high-bandwidth services that will necessitate base stations powered by the MRC6011, but I am not convinced that they will find sufficient demand for widespread deployment.
But then again, I still don't see the need for
a silly camera and color display in my cell phone, so I may be way off base
here.
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