networkZONE Products for the week of May 29, 2006
Bay Microsystems Says
40-Gbit/s Network Processor Empowers Multimedia Triple
Play Networks With Performance & Scalability To 100 Gbit/s
Bay Microsystems, Inc. has announced Chesapeake, the world's highest performance network processor. Chesapeake is the first 40Gbit/s programmable network processor and includes Bay's exclusive MTM (Multimedia Traffic Management) technology. This processor empowers network OEMs to rapidly develop a new generation of broadband infrastructure equipment delivering triple and quadruple play multimedia services.
"Chesapeake delivers the highest performance of any network processor on the market today while using the lowest power per Gbit/s in its class," said Linley Gwennap, principal analyst at The Linley Group. "These unique capabilities will help Bay expand its market opportunities and continue its rapid revenue growth."
Chesapeake is rapidly becoming the heart of systems built to provide residential broadband consumers with robust, high quality user experiences. With an unprecedented 125G of raw engine performance, Chesapeake eliminates design roadblocks and bandwidth bottlenecks. Because video matters - Chesapeake's Multimedia Traffic Management capabilities uniquely provide the agility to manage the cost-effective delivery of converged voice, video and data services. As a result, numerous network OEMs have already committed to Chesapeake for their next generation systems.
"Chesapeake is the highest performance, most feature rich integrated network processor we have seen," said John Sandschulte, vice president of engineering and general manager for Broadband Networking at Network Equipment Technologies, Inc. "We are very impressed and look forward to incorporating it into our next generation systems."
"For the first time in more than five years, Service Providers are specifying and demanding new infrastructure equipment which has resulted in a frenzy of global design activity," said Chuck Gershman, president and CEO of Bay Microsystems. "The customer response to Chesapeake has been overwhelming. Whether it is access, metro, edge or transport equipment applications, Chesapeake has quickly established itself as the processor of choice for building next generation residential broadband network elements."
The Bay Advantage
Chesapeake is a major leap forward in network processor technology and provides
a scalable performance path to 100G Ethernet. The initial version of Chesapeake,
announced today, is targeted for system configurations ranging from high
density over-subscribed 1GE/10GE Metro Ethernet boxes to high reliability
systems up to 40G and beyond, such as:
analogZONE Says . . .
Regardless of whether it's due to a bandwidth gene lurking somewhere in human DNA to blame, or simply the relentless dialectic of capitalism and consumerism exerting a tidal pull on our networking technologies, it looks as if there's an outbreak of 40G fever on the industry's horizon. Sitting at its epicenter is Bay Microsystems, a company that seems to have bet its future on the premise that the network saturation that every network processor and switch fabric maker has fantasized about back in the late 90s is becoming a reality. And if the predicted surge in IP-based video actually does really cause that big sucking sound on our fiber to materialize, Bay is ready to plug the gap with their new 40G network processor/traffic manager superchip.
I'll
go out on a limb and say that Bay is one of the few companies with an architecture
scalable enough to pull off this 4x jump without a completely new design.
Their 40G Chesapeake device builds on the powerful Montego 10G network processor
(reviewed here
April 2002) and the Biscayne 10G classification processor (reviewed here November 2003) which
feature a pipeline design that breaks processing tasks up and assigns them
to separate dedicated engines (see Fig. 1). Each engine has its own instruction
set, and an assigned set of states that it works through while operating
on a packet. Bay stresses that their pipeline is deterministic, ensuring
that the execute and dwell time for a packet does not vary, regardless of
the task being performed on it, including multiple layer-2/2.5 tunneling/encapsulation
schemes used to support pseudowire, MPLS, etc. If you want more details
on how the chips are structured and how they are programmed, feel free to
read my earlier reviews.
Bay's updated engine achieves its 4x speedup using a 2.5x increase in clock frequency coupled with a new dual-core processor architecture that reduces the number of clock cycles required to execute an instruction. They have also added enhanced traffic management for highly granular QoS and SLA management. This allows the Chesapeake's traffic management resources to be programmed and allocated based on the current mix of traffic types in the pipeline instead of a fixed architecture which has specific amounts of capabilities assigned to each type of service.
The processor's already-aggressive support for multicast has also been significantly enhanced for this re-spin, including a 40G-capable replicator which Bay claims is saturation-proof for any application the Chesapeake is likely to be used for. Instead of adopting a more conventional approach, Bay has chosen to identify multicast packets at classification, place them in the transmit buffer along with the rest of the traffic before extracting multicast packets to a separate path. From there they are replicated in parallel and fed back into the front end of the chip for full processing and management as individual streams before actually leaving the chip. The processor's 125 Gbit/s capacity (no, that's not a mis-print) keeps the processor from choking on the extra traffic when a significant portion of the internal flows are replicated and fed back for a second pass through the chip for whatever additional massaging and queue juggling they require. This should allow Chesapeake to support nearly any service, including GbE, 10GbE, IPv4, IPv6, MPLS, PWE3, VLAN, VPLS, H-VPLS, POS/PPP, GFP, and DiffServ, as well as L2/L3VPNs.
Bay's replication-on-the-fly technique contrasts sharply with the frequently-used multicast buffering scheme that pre-processes the packets, buffers them, and then performs the queueing and scheduling before transmit. Bay claims that processors using this more conventional approach can support limited multicast traffic but can saturate quickly as demand grows. I'd argue that this may not be a problem in many applications because I've seen several switch fabrics specifically designed to support multicast and are capable of offloading many of the replication functions from the processor. Nevertheless, Bay is to be congratulated on an excellent and innovative design.
Chesapeake's
external interfaces display the same attention to detail that was lavished
on its innards. Its 16-lane (3.125G) serial 40G OIF standard SPI-5 interface
can also be run in a nibble mode that supports four 4 12.5G interfaces.
Both use the same flow control, and hold off mechanisms and logical addressing
schemes that SPI-4.2 does. This allows it to interface directly to most
transceivers, framers, switch fabrics or other high-rate connections it's
likely to encounter. It also makes it easy to use Chesapeake to complement
packet inspection silicon such as Hifn, Cavium, Raza, NetLogic Trari or
Sensory Networks by offloading the header classification and leaving the
specialized silicon free to twiddle with the payload. In such a scenario,
a designer could attach the inspection processor in a loop-back mode via
more of Chesapeake's 10G interfaces (see Fig. 2), or by using the chip's
HT bus as a look-aside interface.
Bay has introduced this beefed-up version of its original 10G processor because they're hoping to serve the pent-up demand for core bandwidth that's been stagnant since 2001. They expect a big need for 10G and 40G boxes to help boost infrastructure capacity from metro aggregation points in through the core to match the huge edge data rates that VDSL and PoN systems will generate. With VoIP service and IP Video being delivered to subscribers using lower-cost DSLAMs that may or may not be able to handle sophisticated SLA and QoS management, they anticipate that new, more intelligent, core architectures will be needed to make grooming and packet-level decisions deeper in the network. I am a big believer in placing a network's intelligence as close to the edge as possible so I'm a bit skeptical about whether this approach will become the dominant architecture for IP multimedia networks. But regardless of where the network's intelligence winds up, I agree with Bay that their processors will be valuable tools in the core for smoothing inter-network interface discontinuities where priorities, protocols, and policies must be re-interpreted on the fly.
Given its versatility and power, the Chesapeake will find applications in the of metro and core access boxes listed in the release above. It should also come in handy for lots of blade-level products including:
Bay provides a complete hardware and software tool suite facilitating Chesapeake-based network equipment designs. But, as with many smaller silicon companies, I had concerns about what sort of ecosystem of relationships with other vendors Bay had built for itself to give designers all the tools they need to get a product to market quickly. I was glad to hear that they are working in partnership with "several unnamed silicon and software stack vendors" to produce reference designs for 40G products. These collaborations are important to make sure most interoperability issues are ironed out ahead of time, enabling designers to quickly hook up the PHY, switching, and inspection silicon of their choice to the Chesapeake.
As with so many high-end processors, Bay was reluctant to discuss specific pricing. They would only say that while their 40G Chesapeake processor was more expensive than their 10 G Montego, it was "not even in the same zip code" of 4x the cost. Their press release provides a few more clues by stating, "Metro Ethernet solutions designed with Chesapeake are being implemented at a total BOM price points as low as $40 per GbE port and less than $400 per 10GE port." Bay is supporting design starts and accepting sample orders now with samples expected "sometime this summer."
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