networkZONE Products for the week of April 14, 2003
TeraChip and EzChip Says…
Standards At Work - TeraChip and EZchip Release CSIX-Based
Interoperable Gigabit Switch Reference Design
The TCF16X10 Switch Fabric and the NP-1 10-Gigabit Network
Processor represent the market's most integrated, lowest cost-per-port 10-Gigabit
solution for switches and routers
TeraChip Inc., a provider of next-generation merchant switch fabrics,
and EZchip Technologies, a provider of high-speed network processors, announced
interoperability between the TeraChip TCF16X10 switch fabric and the EZchip
NP-1 network processor, and the availability of seamlessly interconnected
development systems. The EZchip-TeraChip solution will be demonstrated at
NetWorld+Interop Las Vegas 2003, from April 29 - May 1.
Bringing together TeraChip's groundbreaking single-chip cell switching fabric with EZchip's world-leading 10-Gigabit network processor, the reference design represents the most integrated, cost-effective solution for the switch/router market. Scalable to 1.28 Tbps with 1+1 redundancy, the joint solution comprises the lowest chip count and power dissipation - 21W per 10 Gbps - among alternative offerings, providing networking equipment vendors with a low-cost, simple system-design solution.
"System vendors continue to strive for solutions that will significantly reduce switch router development time and cost," said John G. Metz, Principal Analyst at Metz International Ltd. "Recently, a multitude of reference designs have emerged through partnerships between merchant silicon vendors. We believe TeraChip and EZchip offer an elegant technical solution with a compelling price/performance argument."
The EZchip NP-1, currently in production, is the world's most integrated 10-Gigabit network processor, saving as much as 80% in chip count, power and cost compared to alternative solutions. The TeraChip TCF16X10, first in a series of fully scalable silicon solutions, offers 160Gbps switching capacity, the highest available bandwidth density on a single chip.
"With its proven versatility and seven-layer deep packet processing
capabilities, the EZchip NP-1 is a perfect match for TeraChip," said
Dror Sal'ee, TeraChip's VP of Marketing. "Leveraging our interoperability
to provide enhanced sub-channel end-to-end flow control, the EZchip-TeraChip
solution ensures full system support for service level agreements (SLAs)
and fairness under all traffic loads," said Amir Eyal, EZchip's VP
of Business Development.
analogZONE Says . . .
I don't normally review collaborations or joint reference designs here since there is almost always a steady stream of important product releases in the queue, but I'll make an exception. I'm doing this in part because this represents a very important teaming of silicon makers that could drive the commoditization of higher-layer (above 2/3) switches to a new price/performance point. Equally important, the fact that these two completely independent silicon vendors were able to collaborate so effectively is a tribute to the vision of the CSIX/NPF standards bodies, and to the concept of industry standards in general.
While it's currently fashionable to denounce most communications standards efforts for their slow pace and complexity, I still say that open standards are the best way to go in most cases. Yes, there are hassles but most of the work involved is simply the price of admission for the intellectual guidelines to assure a particular technology is made available to the greatest number of parties. Consider the two products in this review products as a case in point. I reviewed both the EZchip network processor and traffic manager, as well as the TeraChip switch fabric here in networkZONE, and felt that they were all very well-engineered solutions that minimized the BOM count and cost for their part in a multi-gigabit enterprise or access switch. But for all their functionality they were still at a marketing disadvantage against folks like Broadcom or Marvell because they did not have an end-to-end solution.
Since they both sport a CSIX interface, it was relatively easy to hook the two chips together and produce a reference design that's almost as complete as anything from the "big boys." While not essential, a full reference design can be a critical factor in high-volume markets where manufacturers have tight time-to-market constraints and may not have all the engineering expertise to bring up a complex network product from the ground up.
The TeraChip switch fabric can run with EZchip's processor alone, or for applications where heavy QoS control and policy enforcement is required, you can add their scheduler. I still have some reservations about how much level 4-7 functionality is available from the programmable 4-stage pipeline at higher speeds, but the flexibility it offers is a stark contrast to the limited amount of configuration available in most other "canned" reference designs. I still have not gotten my hands on the development tools that EZchip claims make it easy to create complex custom applications, so I cannot vouch for whether the task is beyond the abilities of the ordinary designer/programmer. Hopefully, I'll get a close-up look at this spring Networld+Interop in LasVegas, where they will be demo-ing the full-up switch design.
I think that this is just what Colin Mick and the original CSIX group (now absorbed by the Network Processor Forum) envisioned when they approached me in 1998 with their vision of a generic switch fabric interface spec. Thanks to their vision TeraChip and EZchip were able to collaborate on what appears to be a real kick-butt solution that keeps functionality to a maximum and the parts count (and power) to a minimum.
With silicon available for all elements of the
design, the Vapor Index Rating is quite low.
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