networkZONE Products for the week of March 14, 2005

Analog Devices Says…
Analog Devices' XFP Chipset & Ref Design Speed Time-To-Market, Eases Interoperability Issues

Analog Devices Inc. has demonstrated a new XFP (10 gigabit small form factor pluggable) optical transceiver chipset and reference design. XFP is rapidly becoming the leading standard for optical transceiver modules that connect to 10 Gbit/s (gigabit per second) ports, such as those used in Ethernet, Fibre Channel, and SONET/SDH protocol applications. XFP is protocol agnostic, uses less than one-third the power, and is one-third the size of an MSA (Multisource Agreement) transceiver with parallel interface. It is also "hot pluggable", meaning the system does not have to be shut down prior to installation. For the fast growing XFP optical transceiver market, ADI's XFP chipset eases interoperability challenges by reducing the jitter requirements of the transceiver module's transmit and receive interface-a critical element for making transceiver modules from different manufacturers work together in the same optical networking system-and the accompanying reference design enables reduced time-to-market.

"ADI's XFP chipset reduces the risk for optical transceiver manufacturers who have fewer resources and less time to bring next-generation 10 Gbit/s products to market," said Peter Real, product line director for Analog Devices' Networking and Interface Products Group. "The high performance of this chipset has the potential to speed the adoption of XFP by solving remaining technical and interoperability hurdles. The very clean jitter performance of the signal conditioner reduces the performance requirements of the transmit and receive ASICs that interface to the optical transceiver module."

For optical network engineers who must implement difficult 10 Gbit/s transceiver designs, ADI's XFP chipset achieves optical eye margins of greater than 20% over temperature to SONET specifications, has receive sensitivities of better than -19 dBm, and offers a signal conditioner with best-in-class jitter performance that greatly exceeds XFP specifications and provides added margin to ease interoperability issues. The accompanying reference kit, which includes an XFP optical transceiver, reduces time-to-market by enabling complete evaluation of the whole chipset.

Analog Devices' XFP Optical Transceiver Chipset
ADI's XFP chipset includes the following Analog Devices' products designed to work seamlessly together:

• Signal Conditioner: The ADN2928 dual XFP signal conditioner retimes the signal in the module on both the transmit and receive paths. The dual signal conditioner has unparalleled jitter performance with jitter generation of 6 mUI rms at OC-192, jitter tolerance of 0.6 UI p-p at 10 MHz for OC-192 and jitter transfer bandwidth of 2.0 MHz, all exceeding XFP specifications. Single transmit (ADN2927) and receive (ADN2926) versions will be available later this year, offering the same jitter performance in separate devices for easy customization of the module layout.
• Transimpedance Amplifier: On the receive path, the ADN2821 is a 3.3 V, 10 Gbit/s TIA (transimpedance amplifier) with only 1.1 µA of total integrated noise, allowing receiver sensitivities of -19 dBm to be achieved in a standard TO-46 can package. The device supports PIN diodes, dissipates only 150 mW of power and has a receive optical sub-assembly (ROSA) reference design that supports the XMD standard.
• Laser Drivers: Two laser drivers support DFB (distributed feedback), FP (Fabry-Perot) and vertical-cavity side-emitting lasers (VCSELs). The ADN2525 3.3 V, 10 Gbit/s Active Terminated Differential LDD (laser diode driver) supports DFB and FP lasers, achieving optical eye margins of greater than 20% over temperature for SONET and greater than 40% for Ethernet, with typical power consumption for the laser and the LDD of only 750 mW. The ADN2530 10 Gbit/s Active Terminated Differential VCSEL driver dissipates only 300 mW for the laser and the LDD, and is pin-compatible with the ADN2525. The active termination feature contained in both devices results in a superior match to transmission lines, and exceptional eye quality at very low power.
• Precision Analog Microcontroller: Use of Analog Devices' ADuC7020 precision analog microcontroller allows the module's functionality to be programmed in software, and supports control of more complicated and higher performance modules. On a single-chip, the microcontroller integrates a powerful 32-bit RISC core with precision data conversion technology that supports up to eight channels of fast, 12-bit analog-to-digital conversion and up to four 12-bit digital-to-analog converters.

About the XFP Reference Design
The XFP optical transceiver reference design is available with the dual signal conditioner, TIA, microcontroller and choice of laser driver, for immediate evaluation of optical transceiver designs. It includes a host board, I2C support, Gerber files, object and source code for the microcontroller, a graphical user interface and technical documentation. The board's layout supports the XMD standard, allowing engineers to easily evaluate their own lasers.

analogZONE Says . . .

There is a classic struggle in progress between copper and optical technologies to dominate the 10-Gbit/s Ethernet market. And unlike the 1-Gbit/s market, it's not quite clear as to who's going to win since the early silicon that currently powers 10GBaseT copper is large, expensive, and power-hungry (8 W or more, vs under 4 W for optical). Unless some truly innovative 10GBaseT silicon arrives quickly (there are a couple of contenders currently in stealth mode that may do this), optical transceivers using the new XFP form factor may have a chance at retaining a significant chunk of their early market share -- if they can overcome some of the inherent cost and production problems that have handicapped earlier optical technologies. ADI has taken notice of this opportunity and is helping XFP products mature as quickly as possible by using their well-proven strategy of integrating external components to save cost, development time, and precious real estate within the cramped confines of the XFP module.

As noted in ADI's release above, their new chip set comes in variants that support both major types of laser driver (VCSEL & edge emitter) and are accompanied by reference design and a working eval board to speed development. They've gone a step further by doing some extensive 3D EM modeling to help designers cope with the noise, crosstalk, and other issues that become critical at 10G speeds.

But beyond simplifying implementation issues, ADI has worked hard to build in performance that will give products more margin in the demanding environments that high-capacity links often find themselves in. For example, their reference design offers -19 dBm receive sensitivity and wide data eye margins (20% for SONET and 40% above the minimum Ethernet mask). The chip set also offers receive path jitter tolerance of 0.6 UI-RMS at OC-192 and employs a dual-loop design that decouples the traditional inverse coupling effect between jitter tolerance and jitter transfer. Decoupling the tolerance loop eliminates one of the classic designer's dilemmas by allowing jitter tolerance to be maximized while minimizing transfer.

ADI's extra margin and its pre-engineered solution may also solve some of the second-sourcing issues I was not aware of until I was briefed on this product. According to ADI, most current XFP designs are not interchangeable -- mostly due to widely-varying output characteristics between manufacturers' parts. Happily, their signal conditioner block can provide more uniformity in terms of jitter performance (both receive and transmit). Much of this involves "smoothing" the weird impedance characteristics and parasitics of the cheap TO-46 cans used to house laser chips and PIN diodes.

An active load (also known as a linear output stage) is used to match the impedances on the transmission lines that connect the driver to the laser. It buffers large variations in impedance mismatch to almost eliminate reflected energy. Real black magic is in the TIA which allows it to work well with a wide range of PIN diodes within the weird and ugly conditions of the TO-46 can. Besides improving overall performance, ADI's solution should also improve production yields, something that may help manufacturers cope with extreme price pressures that 10G XFP will face (caused by steep price drops in 2.5G XFP).

About the only downside I can see to ADI's design is that their signal conditioner and other performance enhancements add an extra 250 mW to the chip set's power budget (750 mW vs 500 mW for other solutions on the market). But I think that ADI made the right call here when they decided to trade off extra margin in performance and manufacturing tolerance it will provide for first-generation XFP products.

ADI's DFB and FP solutions should also help ease the pain of transitioning to XFP form factor profucts in longer-haul 10G applications. In the end I expect that copper-based solutions will dominate this market for short-haul 10G links, but ADI's VCEL-based solution should delay that day by giving XFP-based products the advantages they need to gain a rapid foothold with users.

The XFP reference design is available now. The devices are packaged as follows:

Part	Packaging
Dual ADN2928 XFP signal conditioner	6 x 6 mm BGA
Transmit ADN2927 XFP signal conditioner	4 x 4 mm LFCSP
Receive ADN2926 XFP signal conditioner	4 x 4 mm LFCSP
ADN2821 TIA	0.7 x 1.2 mm die
ADN2525 LDD	3 x 3 mm LFCSP
ADN2530 LDD	3 x 3 mm LFCSP
ADuC7020	6 x 6 mm 40-lead LFCSP  9 x 9 mm 64-lead LFCSP  64-lead LQFP  80-lead LQFP

The dual signal conditioner, TIA, microcontroller and choice of LDD chipset will sell for $50 in high volumes.

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