i/oZONE Products for the week of March 1, 2004
Texas Instruments Says…
6-Gbit/s Science Fair Project -- TI Unveils Its 6.25Gbit/s
CMOS Serial Link Technology
Enables Customers to Increase Port Density of Legacy Backplane
Systems
Enabling 6 gigabit per second (Gbps) transmission over legacy system
backplanes that currently run up to 3Gbps, Texas Instruments Incorporated
has announced its first 6.25Gbps serial link product in its advanced CMOS
technology. Further extending the company's expertise in high-speed serial
and parallel I/O, this technology gives customers the ability to increase
the port density of existing systems without having to replace legacy backplanes.
"The TLK6B008 capitalizes on TI's high-performance, cost-efficient CMOS process to meet communications equipment manufacturers' need to pack more ports in less space, while providing excellent signal integrity across marginal backplane environments," said Martin Izzard, director of the fiber optics and backplane business unit of TI's high-performance analog business. "This new technology enables our customers to offer more cost-effective, high performance equipment to network service providers and enterprise customers."
The TLK6B008 has eight 6.25Gbps bi-directional serial data channels on the sharp end and sixteen 3.125Gbps serial data channels on the blunt end, providing 100Gbps data throughput. The receiver uses 4-tap adaptive DFE (Decision Feedback Equalization) receive equalizer technology, including cancellation of the first post cursor. The transmitter uses a 4-tap equalizer with fully programmable coefficients at 5-bit resolution. This sophisticated equalization compensates for ISI and cross talk, which is essential for operating in legacy system environments.
The TLK6B008 extends the life span of today's XAUI (10G Ethernet) backplanes,
thus preserving technology investments made by the system manufacturers.
When coupled with TI's advanced design methodology, a 6.25Gbps macro also
enables high density integration of many 6.25Gbps serial links on digital
VLSI ASICs, including switch fabrics, to reduce overall system power, size
and cost. The technology is available today in TI's ASIC library, providing
an integration path for customers seeking higher performance in their network
infrastructure products.
analogZONE Says . . .
It's exciting to see Texas Instruments weighing in on the issues surrounding advanced Gigabit SerDes, and bringing some unique perspectives to the market. Although they've been rather quiet of late, they are by no means newcomers to the SerDes business. They've been at it for many years, with much of their business coming from second-sourcing National's venerable line of 1-Gbit/s parts. This product announcement indicates that they have decided to leapfrog themselves into the emerging 6 - 10 Gbit/s market rather than evolve through the 3.125-Gbit/s technologies that vendors like Broadcom, Marvell, and Vitesse have developed. Given the additional attenuation, reflections, and other severe line impairments encountered at these speeds, they certainly had their work cut out for them.
From my conversations with TI, it seems that they have done their homework and spent lots of resources modeling the environment of many so-called "legacy" backplanes (products already in the field) at 6 GHz. During my briefing, I was pleased to hear they decided that intelligent adaptive equalization is a key technology for successful operation at theses speeds, something that further validates the pioneering work of Accelerant, Key Eye, and a few others that blazed trails in the rarified atmosphere above 5 Gbit/s.
TI's first fruit is the TLK6B008, an octal monster mux, with eight 6.25-Gbit/s channels fed by 16 3.125-Gbit/s SerDes inputs. The 3.125-Gbit/s interface in the transceiver is intended to hook up directly with many modern switch fabrics, traffic managers, and other devices that sport SerDes outputs to jam both of them down a single backplane channel. I was a bit shocked to hear the part can draw as much as 7 W with all its features enabled, but am much less concerned now that I understand that this part is much more of a "science fair project" than a commercial solution that TI is using to test its technologies with. Other than the power consumption, it's a very impressive first effort, and seems to be equipped for every contingency that a highly-impaired legacy backplane can throw at it.
The first thing that caught my attention is the 4-tap decision-feedback adaptive equalizer (DFE). I'm reasonably familiar with digital DFEs often used in Fast Ethernet receivers, but am less familiar with the analog implementations that must be used at these extreme bit rates. I'm probably admitting to gross ignorance, but it's only fair to let you know that this was the first time I'd heard of an analog DFE that used what they call a "discrete time architecture" -- and I'm still a little fuzzy on how it works. To their credit, TI was not so much evasive about the details of their EQ as unprepared to talk about them since nobody had asked to do so before.
From what I was able to glean from the briefing, the EQ's analog tap coefficients are adjusted on a per-bit basis. TI says that the equalizer can place the sampling window that it uses to calculate its coefficients close enough to the bit in question that the device can cancel both adjacent symbol and reflected interference.
Each transmit channel also has its own programmable 4-tap, 5-bit feed-forward equalizer (FFE). It uses a 5-bit DAC running at 6.125 GHz that sets the pre-emphasis levels on a per-bit basis. From I was able to infer, I believe that it calculates pre-emphasis on a per-bit basis to help preserve dc levels and minimize the amount of energy being pumped into the channel to help control crosstalk. While transmit EQ does help improve reach in backplanes with severe attenuation, boosting the high frequency content of signal can also cause crosstalk problems in some adjacent channels. This is especially apparent in older backplanes. TI's approach of providing selectable, highly-programmable transmit EQ should allow designers to "tweak" problem channels with just the right level of pre-emphasis to get the signal through. Keeping the FFE off for channels that don't benefit from pre-emphasis will also save significant amounts of operating power.
One of the other nice things about this transceiver is that its flexible clock architecture allows the device to run in several different speed ranges, all the way down to 1.25 Gbit/s. All channels derive their timing from a single low-frequency (ie inexpensive) 62.5-MHz reference clock that is multiplied up to the CDR frequency by an on-chip LC oscillator. The PLLs run at the device's top clock speed (5.5 - 6.5 Gbit/s), allowing lower speed ranges to be derived by a simple divider circuit. TI says that thanks to the high Q of the on-chip LC components used in the CDR circuits, the receive side has rock-solid jitter characteristics that demonstrate a jitter figure of 2 ps rms.
Editor's Note: I wish I could have squeezed more details about the CDR out of the folks I interviewed to see how they can achieve such good stability with the wide control loop bandwidths the circuit seemed to have. Unfortunately, my questions were politely deflected and I'm still in the dark. Any reader's insights on the parts of the CDR, or equalizers that they can offer from their work in the field, or actual hands-on experience with these chips would be most welcome here.
The result of this combination of technologies is an octal transceiver that, according to TI, "delivers 6.25 Gbit/s over the worst backplanes we know of". While they would not mention names, I was able to infer that this includes 8-year old, 1.25-Gbit/s backplanes designed by a "leading networking equipment manufacturer."
Of course, the price you pay for this flexibility is power -- up to something close to 900 mW per channel when you've got all the features kicked on. Part of the part's power-hungry nature is explained by the fact that TI has a 12-Gbit/s transceiver design under way. From what I'm told, it will use the TLK6B008's equalizer cores to enable a 4x speedup of "modern" 3.125-Gbit/s backplane channels.
TI is definitely looking towards a big future in SerDes and was very explicit in its plans to use the building blocks they have produced in larger ASICs and merchant chips. While early adopters will use this chip and trim power by selectively invoking transmit and receive EQ, we can expect "lighter" versions of the technology to appear both in standalone transceivers, as well as being integrated into more highly-integrated parts. For example, deleting the FFE (a very power-hungry element that's not very useful in older backplanes) would save significant chunks of both power and silicon real estate.
I have not seen it run, but it appears that TI has produced an interesting "science fair" project that will allow them -- and their customers -- to learn about what it really takes to run high-speed channels in both legacy and modern backplane environments. Of course equalization is still a black art, and I'm still a tad skeptical of the claims they make for their discrete time architecture. Oddly, I do find some reassurance in their high power levels because it indicates to me that they are really concentrating on performance.
But given all the unknowns and variables in the equation, the only real way to verify these claims is with some real-world data. I'll look forward to hearing any reader's experiences with these parts, and also will do whatever I can to persuade TI to come run their chip on the "Equalize This!" Gigabit test challenge that we're conducting in conjunction with Georgia Tech. Hopefully, TI will be able to come down and show us all what their technology can do when we run it in side-by-side comparisons with other SerDes parts on our collection of challenging backplane environments.
Texas Instruments was very coy about pricing for the TLK6B008, and would only say that it would be "competitive" with comparable products. They were happy to inform us that it comes in a 19 x 19 pin full-array FC-BGA package with 1 mm ball pitch. They also told me that the TLK6B008 is available for sampling now to partner customers.
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