The Great Gigabit Backplane Shootout Arrives!
10 Companies Answer A Baker's Dozen Questions To Shed Light On The Science, Technology, Economics, And Politics Of High-Speed Backplane Silicon.

by Lee Goldberg

It's been nearly six months since the i/oZONE section of analogZONE first proposed the idea of providing a forum in which manufacturers of multi-gigabit backplane transceiver silicon could debate the complex, and sometimes murky issues that factor into their technologies. And although it's taken about three months longer than I'd hoped to develop the questions and compile the answers, I think you'll find it was worth the wait.

The shoot-out came into being because of the conflicting claims being made between advocates of binary-level and multi-level signaling technologies (BLS/MLS.) Each claimed that their technology offered the highest-performance, lowest-cost, most energy-efficient way to ship multi-gigabit data streams across the noisy, hostile backplane environment.

As the debate evolved, we also began to look at issues within the more heavily-populated BLS community as well, and included questions about the optimum techniques for equalization, pre-emphasis, and other signal-correction techniques. The shootout also sought to glean industry experts' understanding of the other factors in backplane design, and how they drove the requirements of the silicon.

We've gotten responses from ten manufacturers of the original dozen we invited to participate, each answering a list of questions compiled after consulting with industry experts. Although there seem to be many areas of agreement in their answers, there also are many areas where manufacturers differ. As you will see, the divisions are most often along the BLS-MLS fault line, but there are several clear areas of disagreement within the BLS camp over the best equalization schemes, and the market's future directions.

As a bonus, we're proud to offer you several contributed white papers from the likes of PMC-Sierra and National Semi that should add to your insights on both backplane design, and the issues surrounding the semiconductors that go into them.

Of course, no study of this nature is ever definitive or complete. Despite our best efforts, there are probably many important questions that were not put to our participants, and several backplane silicon vendors who were somehow overlooked. If interest warrants, we'll be running a second part to the shootout, with additional questions that get raised as a result of this first forum. We are also open to the idea of opening the process up to any additional newcomers.

For now, however, there should be sufficient material here to inform, communicate, and stimulate a series of lively debates in this rapidly evolving field. If you have any questions, comments, or suggestions on this, or any other issue, feel free to write me at: lgoldberg@green-electronics.com.

Scroll down to the questions to explore the shootout results! You can either step through them in linear fashion, from the "next question" links at the bottom of each section, or return to this page to skip around according to your interests.

Additional Material

Contributed White Papers by:

* The content of these papers is provided by the manufacturers and does not necessarily reflect the views of analogZONE editorial staff.


The Questions

  1. Has the recent carrier consolidation and the slower roll-out of higher-capacity transmission and switching technologies affected either the need for a 10+ Gbit/s SERDES backplane, or the market timeline for such products? View Responses
  2. What role do standards for performance interoperability have in the SERDES backplane market? What are the most significant activities in this area, who are the players, and what is the anticipated timeline for useful results? View Responses
  3. What are the primary line impairments, and design challenges faced by backplane designers? View Responses
  4. What is the state of the art in channel modeling, and what does it tell us about choosing a particular approach to backplane and backplane transceiver design? View Responses
  5. What is the most optimum technology for high-speed serial backplanes at multi-gigabit data rates - multi-level coding or binary signaling? View Responses
    Responses should address, but not be limited to:
    1. Which technology performs best under "real-world" line impairments and noise conditions?
    2. Which one creates the least self-induced NEXT and FEXT cross-talk?
    3. Which technology delivers the lowest "Watts- per-Gigabit" at 5, 10 Gbits/s and above?
  6. What are the factors affecting performance limitations for SERDES and PAM, and what are the practical capacity limits for each technology. View Responses
  7. Are there specific applications where one technology is clearly the better choice? View Responses
  8. What is the most optimum equalization technique for copper media such as PCB traces and copper cables - transmit pre-emphasis or receive equalization, both, or something else? And do equalization requirements change depending on the line coding technique? View Responses
  9. What equalization technologies are more suitable for an ASIC with large channels of SERDES or PAM channels? View Responses
  10. Regardless of performance, which technology is most cost effective for a given application? Which technology produces the lowest cost solution, once electronics, connectors, materials, and manufacturing costs are factored in? View Responses
  11. Would it be more cost-effective to employ improved materials and/or manufacturing processes to improve the electrical characteristics of backplanes to reduce the complexity, cost, and power consumption of the transceivers? View Responses
  12. There will probably be a large market for upgrades of existing equipment, where faster line cards and switch fabrics are used to increase their capacity and intelligence. Are there any technical issues or types of line impairments that are most important considerations in these kinds of applications? Which technology is best suited for these retrofit designs, and why? View Responses
  13. Is it too late for any SERDES technology to maintain its market share because optical backplanes are maturing so quickly? View Responses




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