The Great Gigabit Backplane Shootout - Question
#5
The amount of empirical data on binary signaling is very limited. To date, the only commercial products capable of operating at speeds up to 6.25Gb/s on over 50 different customer backplanes have been devices which use multi-level coding. In the future, when other vendors are able to sample their binary products, the industry will have real data for comparison purposes.
The optimum number of signaling levels depends upon the loss versus frequency characteristic of the worst-case channel and the desired data rate. For channels with small amounts of loss (e.g. low speeds or short traces), either system works well. For channels with higher loss (or when more data must be moved through the same channel), binary signaling is sub-optimal.
Loss mechanisms in backplanes are dominated by dielectric loss, which is linear with frequency. In addition, impedance discontinuities typically present additional loss terms that produce more than linear increases in loss with frequency. For example, a typical worst-case channel may have 11dB of loss at 1.56GHz and 25dB of loss at 3.125GHz. This gives a starting advantage of 13dB to a PAM-4 signal over binary. However, a PAM4 eye consists of a stack of three eyes vertically, and therefore loses 20*log10(3), or 9.54dB of this advantage, leaving a 3.46 dB advantage.
However, so far, we've considered only the relative sizes of the eye openings (assuming that both are well equalized) which result when the signals are initially launched with the same magnitude. What hasn't been considered is crosstalk. Both systems may transmit the same full-scale signal amplitude, but the binary transmitter must launch with faster edge rates; the binary receiver must maintain a higher receive bandwidth. As a result, binary transmission causes more high-frequency energy and allows more of it into the receiver.
But two important channel impairments, crosstalk and echoes (delayed signal components which have reflected back and forth between impedance discontinuities) have high-pass characteristics. So within the binary receiver, the signal is smaller and is delivered with larger crosstalk and echo impairments.
Power requirements for the systems are considerable. The binary transceiver has baud intervals which are half as long in the time domain, and it generally requires the generation of transmit reference clocks and receive CDR with less jitter. This requirement translates directly into power consumption. In addition, the need for at least part of each binary transceiver to operate at twice the speed makes it much more difficult to hit the same maximum operating speed in a given process technology when compared to PAM4; trying to get around this problem costs binary solutions considerable power as well.
To be an optimum technology, several factors must be considered: cost, signal integrity, power, interoperability, and availability.
An optical solution wins for signal integrity and availability, but currently loses on price and power consumption.
Today, NRZ signaling at multiples of 3Gbps are still the lowest cost, lowest power, and highest signal integrity silicon solutions. In the near future, 6Gbps silicon solutions will likely overtake 3Gbps solutions from a cost and overall power perspective. The 6Gbps solutions will come with significant backplane signal integrity issues that might prove unattractive to system vendors given the only 2X throughput improvement and the added backplane cost.
From an interoperability perspective, NRZ signaling is most attractive. NRZ solutions also perform better in the presence of crosstalk. In the absence of multi-level coding standards, silicon vendors will be driven to provide NRZ solutions at both 6Gbps and 10Gbps.
Optimum is a relative term. In the context of a standards based design, the technology is constrained to adhere to the standard and is not considered optimum unless it does. Generally speaking, as bandwidth requirements increase, the channel tends to force use of increasingly complex symbols. Where channels are very good, as is expected of almost all of the new 10GB/s backplane designs, there is no particular advantage to multi-level coding. Where channels are very bad, as exist in some legacy backplanes, there may be no choice but to go to multi-level coding as the binary signaling solutions just don't have the dynamic range to equalize the channel.
The major limitation to PAM is the requirement for linear operation of the electronics under all conditions, and the need for fast decision circuitry. This can be achieved with CMOS designs, but is more problematic than a simple 1-bit slicer used in SERDES. The limit of operations can be either the ultimate speed of the silicon to quantize 1-bit data, or the ability to manufacture analog circuitry adequate to process multi-level signals.
That said, multi-level (e.g. PAM-3, PAM-4, etc) solutions for baseband signaling (backplanes) suffer worse from NEXT and FEXT than does binary signaling and require more power to accomplish the signal processing tasks to extract the date from the symbol. Equalization is required in both solutions, but multi-level coding takes more watts/gigabit. (There is a lot of differentiation between alternative technologies that affect his answer, however). And since multi-level coding requires complex digital signal processing, it consumes more die area and result in higher cost/gigabit.
Multi-level (e.g. PAM-3, PAM-4, etc) solutions for baseband signaling (backplanes) suffer worse from NEXT and FEXT than does binary signaling. It is because the decision threshold is reduced, resulting in signal reduction of 6dB for PAM-4.
Binary delivers the lowest Watts-per-Gigabit at 5,10 Gbits/s, since it require smaller amount of circuitry.
The "real-world" line impairments vary from backplane to backplane. Unlike standard based high-speed copper links such as gigabit-Ethernet 1000BaseT, where the media is clearly defined, in backplane application, the designers of backplanes may have both system specific restrictions as well as many degrees of freedom in selecting the board material, the connectors, the length of the backplane etc. which fits best in their application. Therefore the most optimum solution is achieved when the designers consider all the various choices of medium and combine that with the appropriate SerDes technology. For example if the backplane designer selects a high-frequency board material and connectors, or a short trace backplane, then the right SerDes technology might be a simple 5Gbps or 10Gbps binary (NRZ) signaling. On the other hand, if the designer is restricted to using an older backplane with poor material, then sophisticated signal processing becomes essential in achieving higher throughputs.
Generally speaking, NRZ technology is more power efficient than PAM encoded technology delivering the same data rate. The binary technology begins to consume more power when you need to include advanced signal processing (eye opening) at the receive end of the signal. Again, the need for this signal processing logic is dependant on the choice of medium and application requirements.
There are a huge number of variables related to the board material, the connectors, and the size of the backplane. Vias and stubs can also play a big part in the equation. Since most current "real-world" environments are constructed using standard FR-4 material and legacy connectors, the answer is tied to the length of signal runs that will be seen from one driver on a linecard, across the linecard, thru vias, thru the connector, across the backplane, thru a second connector, thru vias, and across one final board to the receiver. While more costly PCB materials and connectors that offer some improvements can be specified for totally new systems, they will not completely eliminate these issues. They also are no help to systems already in the field. A solution is needed that gives as much SNR to your design as possible so that minor changes in the environment do not result in system failure.
For very small backplanes two level signaling at 6.25Gb/s may be practical; however, as you approach standard NEMA size (19") cabinets additional work must be done in the receiver to try to recover the degraded signal. This often mandates a DFE (Decision Feedback Equalizer) with a corresponding increase in power consumption. The capability to run in actual systems at these distances adds a requirement for improved materials and connectors. Pre-emphasis which was a benefit at lower speeds, now becomes a detriment in a system where higher frequency energy translates into more crosstalk.
Based on our work with OEMs, and combined with our internal studies, it has become clear that full duplex multi-level signaling is the only answer for today's backplanes once you cross 15" (See Figure 3). The question then is simply a matter of performance and power. Using only simplex 4-PAM at a 3.125G signaling rate results in roughly comparable performance to a two level 6.25 Gb/s solution for a 30" system. This goes back to the classical information theory analogy of "water pouring" which dictates that transmit power be allocated to the frequency bands with the best SNR to maximize the channel throughput. Full duplex 4-PAM is clearly the best choice with its 1.5 Gbaud signaling rate. It suffers the lowest channel loss, lowest crosstalk and generates the least spectral contamination of all the alternative configurations. It also uses about the same amount of power as a two level signaling solution without a DFE.
Alternative 5-PAM technology must use FEC (Forward Error Correction) techniques to overcome the sensitivity to the narrow signal levels used. This leads to better performance than a two level solution but at a cost of two to three times the power. Despite consuming more power the resulting performance is still well below a full duplex 4-PAM solution.
The dominant noise issue in backplanes is NEXT and FEXT. Since these types of noise are largely due to coupling occurring at or near the connectors, one needs to review the coupling effects in this vicinity to answer the question. The coupling or crosstalk in or around the connectors comes mainly from mutual inductance and capacitance. The formula for mutual inductance,
Vvictim noise = L(mutual) * (dIaggresor/dt)
and mutual capacitance,
Ivictim noise = C(mutual) * (dVaggresor/dt),
both are tied to how fast the signals are changing on the aggressor signal pair in the connector. The solution with the slowest signaling rate (assuming slower edge rates) will create or exhibit the lowest levels of NEXT.
For very small backplanes using current materials and connectors two level signaling due to its simplicity has an advantage that will be difficult to overcome. At longer distances full-duplex 4-PAM will offer similar power numbers (<800mW per 10 Gb/s) and far superior performance than other solutions. At speeds over 10 Gb/s the answer becomes simple. Under the same material constraints as being used today, full duplex multi-level signaling is the only solution.
This question addresses a constellation of issues closely tied in to questions #6 & #7. We have answered these three questions in an extended form in Question #7. Please see the table in the answers to question #7 for a full explanation.
In general MLC has advantages due to the loss and crosstalk issues when you go higher in frequency, but, 2-level coding is most efficient in terms of complexity and power = cost. If systems, backplanes, connectors and SERDES are designed properly upfront, binary signaling will clearly have a cost and power advantage.