The Great Gigabit Backplane Shootout - Question
#4
The state of the art method for channel modeling is to measure every element in the transmission path including the through channels and crosstalk from adjacent channels, instead of modeling them, and use the resulting s parameters directly.
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Most channel simulation is performed with tools that can seamlessly move between the frequency and time domains. Channels are comprised of a mixture of measured (S-Parameters, Impulse Response, etc), modeled (3-D EM simulation, 2-D simulation, spice,etc) and constructed (HSBI, XAUI, etc) blocks, Most simulation tools take the form of DSP simulators (MATLAB, Ptolemy, ADS, Ansoft, Cierto, etc.),though some suites support more heterogeneous simulation environment (ADS, Ansoft).
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Much of the reason for confusion in this space is that many people are just beginning to recognize how hostile the backplane environment can be at high speeds. Even today very few OEM's have access to S-parameter data from their own equipment. Assumptions have been made without this data using only simple material loss numbers and second-hand connector information. When you are running signaling speeds up to 3.125 Gb/s (Nyquist frequency of ~1.56G), the channel losses and lower crosstalk offer a designer some margin. The difficulty is in the circuit design. As the losses increase over 20dB and NEXT grows appreciably, this margin disappears. Not understanding your true system noise margin can result in a system that does not work, or worse, a system with intermittent or inconsistent performance in the field.
In order to evaluate architectural alternatives and the spectral compatibility aspects of this problem, KeyEye developed proprietary software tools that can make use of S-parameter information, connector crosstalk data, along with critical mixed-signal implementation constraints like analog transistor mismatch and passive element matching data. Having these tools available was critical in helping us select a full duplex 4-PAM architecture. As an example, choosing only a simplex 4-PAM solution with a 3 Gb/s signaling rate results in a 6-7 dB SNR penalty over full duplex 4-PAM systems in a 30" FR4 backplane. This simplex 4 PAM performance is not much different than that of a two level 6.25G solution. These tools helped us compare the true performance for eight different device architectures before identifying the optimal solution.
State-of-the-art uses sophisticated Network Analyzers to obtain s-parameters. The s-parameters are analyzed for the loss and cross-talk characteristics of the channel.
The most reliable board model is the S-parameter model because it is
a measured model. Theoretical models can be dangerously off due to unpredictable
characteristics such as connectors' parameters, board thickness variation
and dielectric constant variation.
HSPICE and Agilent's ADS (2-D and 2.5-D field solvers) are popular in the industry for modeling (predicting) PCB behavior. At high speed, the accuracy of these predictions is usually questionable and requires "calibration" from bench data. As a result, most serious work relies on measurement-verified modeling. The bench measurements use both TDR and differential network analyzer tools to verify the backplane channel characteristics predicted by the simulation programs.
For cable channels, it is time consuming to model with a field solver (not to mention the accuracy problem), and therefore better suited to using a measurement-based technique directly. Some designers may prefer to go one step further and convert the network analyzer measured s-parameter to an approximate lumped transmission line element that simulators find easier to converge.
The main tools are ADS, Matlab and HSPICE. HSPICE modeling is an excellent tool for most backplane modeling. These suite of tools provide fairly extensive parametric analysis for backplane parameters such as loss, discontinuities/reflections, crosstalk, etc. These are all factors that help determine the ideal amount of pre-emphasis/equalization required, launch amplitude, jitter budget and receiver sensitivity.
Channel design is an art. Modeling and simulation is critical to explore the impact of variations at the limits of manufacturing tolerances in both the ICs and the PCB materials.