The Great Gigabit Backplane Shootout - Question #10

Regardless of performance, which technology is most cost effective for a given application? Which technology produces the lowest cost solution, once electronics, connectors, materials, and manufacturing costs are factored in?

Accelerant / Agere / BitBlitz / Broadcom / KeyEye / Marvell / Mindspeed / National / PMC-Sierra / Velio


Accelerant Says…

In terms of die size, there is no considerable difference between a PAM or binary approach. However, PAM's key advantage here is the ability to achieve very high speeds without the need for the most advanced process technology which can raise the cost of the die and reduce the overall yield. Also, by operating at a lower frequency, the PCB material, connector and packaging demands for PAM are much less stringent, resulting in a lower overall product cost.

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Agere Says…

Multiples of 3Gbps currently provide the lowest cost overall solution. That will change as high speed (>5Gbps) connector and board fabrication techniques become more mainstream.

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BitBlitz Says…

This is a difficult question, and one that would tend to generate subjective answers. Assuming future board fabrication and connector costs will be roughly equivalent to today's standards, it would cost less for a SERDES approach just from the standpoint of silicon area. This assumption is supported by data provide by different connector and board vendors.

Regardless of the coding scheme, standard CMOS process is a "MUST", in order to allow future integration.

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Broadcom Says…

Once again depending on the application the lowest cost solution can be bi-level SerDes or a PAM solution.

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KeyEye Says…

The easiest way to address this question is to focus on the configuration of the existing system and what changes are required to make use of any new solution. In the case of a full duplex 4-PAM solution, we allow the designer to continue using all the same low cost materials, interfaces, connectors, and manufacturing processes as they are using will be little change. The end result is a 2X bandwidth density improvement with little change in BOM costs. In fact, in volume the pricing for these speedier devices will actually offer a cost reduction from current XAUI devices for comparative bandwidth and be contained in a smaller amount of board space.

Other solutions will require improved connectors or board materials to meet the same levels of noise margin along with more complex system solutionstoday. If the design today makes use of external SERDES the costs are similar and there.

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Marvell Says…

SERDES is the most cost effective technology.

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Mindspeed Says…

The table below summarizes the cost element versus technology.
(+) advantage = less cost
(-) disadvantage = more cost

 Cost Element

Bi-Level Signaling

Multi-Level Signaling
 Electronics

 +

 -
 Connectors

 -

 +
 Board materials

 -

 +
 Manufacturing

 +

 -
 Development (time/complexity)

 + +

 - -
 Test

 + +

 - -

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National Says…

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PMC-Sierra Says…

Binary coding with pre-emphasis for short link and binary coding with both Rx equalization at Tx pre-emphasis for long reach.

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Velio Says…

If the backplane was designed in the mid '90s, PAM should be looked at. For any modern backplane, NRZ is better given the very low cost implementation of integrated NRZ, and the mainstream costs of modern differential connectors.

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