hf/rf ZONE Products for the week of September 23, 2002
Analog Devices says . . .
AD9858: Flexible Integrated Synthesizer For Wireless
Analog Devices Inc., a global leader in high-performance semiconductors for signal processing applications, announced an integrated synthesizer that is the first solution to feature a 1 GSPS direct digital synthesizer (DDS), 10-bit D/A converter and fast frequency hopping and fine-tuning resolution functionalities on a single chip. The low-cost AD9858 performs at more than triple the speed of previous solutions, without increasing power dissipation, making it well-suited to wireless infrastructure as well as military and aerospace radar applications.
In wireless base station applications, the AD9858 provides a lower-cost integrated and flexible platform for realizing fast hopping synthesizers that do not require isolation switches. On-chip functional blocks include a DDS core, a digital to analog converter (DAC), 2 GHz RF mixer, a 150 MHz phase detector and a programmable charge pump with proprietary fast-locking acquisition logic. The integration of these multiple functional blocks and their respective levels of performance enable the AD9858 to achieve breakthrough synthesizer performance at low levels of cost, power dissipation and implementation complexity.
"Unlike other high-speed DDS products that are available, the AD9858
integrates a DAC, phase/frequency detector and charge pump," said Kevin
Kattman, product line director for high-speed converters at Analog Devices.
"The result is a highly cost-efficient solution that addresses designer
requirements of low phase noise, low spurious energy, fast frequency switching
and wide bandwidth linear sweeping capability."
analogZONE Says . . .
The most important feature of the AD9858 is its ability to change frequency in less than 5 ns, meaning that there is virtually no application left where you will need to go the expense of switching between two separate synthesizers.
The architecture of the part has been completely changed since the 14-bit AD9857 which was a 200 Msample/s quadrature digital upconverter. The analog functionality that has been brought on chip includes the PLL and the analog multiplier (mixer) for the actual conversion. Instead, too, of boasting "14 bits" the architecture uses whatever is needed at each stage in the game: Frequency accumulation is 32 bits, phase accumulation is 15 bits and the output of the phase-to-amplitude converter is 10 bits, as is the output ADC - which can be clocked up to 1 Gsample/s. The 32-bit frequency tuning word is equivalent to a 0.233 Hz resolution at 1 GHz allowing for sub-Hz tuning adjustments while the DAC has complementary outputs to provide a full-scale current output that is set by an external resistor.
With a frequency output spanning more than 40 octaves automatic frequency sweeping is possible from dc to the maximum output frequency of 450 MHz and parts can be synchronized to one another. Clock inputs can be up to 2 GHz with a divide-by-two function available at the reference input allowing for RF designs to use the part directly on 1.9 GHz channels.
Phase noise at the output is down at a staggering less than 130 dBc/Hz (1 kHz offset and at either 40 or 180 MHz output) although the data sheet does not at this stage give the translation loop and fractional divider loop performances, which are going to be critical for SFDR at the operating RF channel.
The charge pump in the PLL (which requires a separate 5-V supply) is where the fast locking time is achieved with an algorithm that is optimized with the external loop filter design. The algorithm puts the charge pump into one of three modes: frequency-detect, wide-closed-loop, and final-closed-loop modes. Rather than operating in a continuing closed-loop feedback in the frequency detect mode the charge pump notes the direction of the errors and supplies a fixed current of the correct polarity to knock the frequency/phase closer to a lock. When that lock is detected the mode is changed to one of the closed-loop modes. Fiendishly clever.
The DDS section of the AD9858 has three operational modes: Single-Tone, frequency-sweeping, and sleep modes. In the operational modes all changes in frequency are achieved with phase continuity (not coherency.) In the single-tone mode the output is determined by the 32-bit frequency-tuning word and frequency-changing times are restricted only by register updating; if faster changes are required four frequencies can be profiled for hopping between.
The frequency sweeping mode of the part allows for very simple implementation of chirp radar but the main applications will be in basestations and instrumentation, where it will be a winner from the get-go. A really nice innovation in architecture with a frequency capability that finally puts DDS synthesizers right into the mainstream.
With a 3.3-V rail (except to the charge pump) the worst-case power consumption is a typical 1.9 W, which drops to 10 mW in sleep mode.
The AD9858 is in production in thermally-enhanced TQFP-100 and is priced
at $49.50 in 1000-piece lots.