hf/rf ZONE Products for the week of January 6, 2003
Analog Devices says . . .
AD9951/2/3/4: Direct Digital Synthesizers Deliver
High Speeds And Low Dissipation
Analog Devices Inc., a global leader in high-performance semiconductors for signal processing applications and the market share leader in data converters, expanded the company's already extensive portfolio of radio frequency (RF) ICs with a new family of direct digital synthesizers (DDS). The new chips deliver a 400 MHz clock speed at one-tenth the power consumption of previous solutions. This now enables designers to use DDS for fast frequency hopping at higher output frequencies in more power-sensitive applications. DDS, which is the technique of digitally creating and manipulating sine waves - or other continuous wave forms - in the digital domain, is the preferred technology for applications requiring superior digital frequency agility, output phase control, and excellent phase noise performance. Typical applications include satellite communications, broadband networking, radar, test and measurement, and instrumentation.
The new DDS devices are the first in the industry to clock at 400 MSPS and synthesize frequencies of up to 160 MHz while dissipating less than 200 mW of power. Previous DDS chips of comparable resolution could only synthesize frequencies up to 120 MHz and dissipated 2 watts of power. The lower power dissipation now allows designers to use multiple chips on a single PCB with less concern for thermal issues. Additional features of the family include an integrated 14-bit digital-to-analog converter, on-chip random access memory (RAM), phase offset and amplitude control, and multi-chip synchronization.
"Designers of radar systems and shaped FSK (frequency-shift keying) communications applications now have increased flexibility and the ability to enhance accuracy, tuning and phase control by using the automatic linear and non-linear frequency sweeping capabilities of these chips," said Kevin Kattmann, product line director for High-Speed Converters, Analog Devices. "This combination of breakthrough speed and power dissipation will extend the attributes of DDS into many new applications that were previously bound by the limitations of traditional analog synthesis technology."
The new DDS family comprises four new 14-bit devices with various added benefits. The feature sets were selected to allow designers to purchase only the functionality needed for the desired application. The four family members and added functionality are the following:
analogZONE Says . . .
14-bit resolution, 160-MHz output, 200 mW dissipation - what's not to like! These products are a major breakthrough in DDS with one additional feature not emphasized that much by the company that is, I believe, going to open the door to the spawning of a bunch of new products. That feature is that the DDS can now be synchronized to others or, it/they could be phase modulated. That makes it possible to change the available security on frequency-hopping systems as well as resolving problems in some test and measurement set-ups where external phasing can be at best tricky, and often downright impossible. The parts have synchronization inputs and outputs and master-slave relationships can be set up. There are a number of applications in radar and scanning systems, as well as in test and measurement where multiple synchronized DDSs on the same PCB would be highly desirable - and that will now be practical with these parts removing the fair amount of real estate needed previously for discrete phasing.
DDS is, of course, the generation of ultra-precise frequencies in the digital domain and under digital control with an output DAC that provides sinoid signals. This family also offers a comparator in two of the versions which could be driven by the sinoids to produce square waves for clocks. With operations up to 400 MHz (for up to 160 MHz outputs) the parts use an external crystal (if they are not being synchronized - when an on-chip buffer can be activated) and there is both a 4x and 20x multiplier available, if needed, on-chip. The parts operate at 1.8 V but the I/O can operate up to 3.3 V (with support up to 5 V on most digital inputs) to interface with LVCMOS or LVPECL. The family has a serial port transfer rate up to 25 Mbit/s.
The dramatic reduction in power consumption comes mostly from the process and the lower supplies needed. ADI also claim that the analog architecture has been very carefully designed for minimum dissipation. The full-scale output current from the DAC is a typical 10 mA with a gain error within ±10%FS and a maximum output offset of 0.6 µA. Residual phase noise is very dependent on whether either of the reference clock multipliers is being used - typical numbers at 40 MHz output (1 kHz offset) are -116 dBc/Hz with no multiplier used to -105 dBc/Hz with the 4x multiplier enabled and -89 dBc/Hz with the 20x multiplier enabled. The preliminary data sheets do not give wideband/narrowband SFDR numbers for the main outputs, as yet.
Output jitter, across the complete output spectrum range is a typical 20 ps rms. A 1024 x 32 static RAM is included in two versions of the part to support frequency sweep programmability while the AD9954 also supports a user-defined linear sweep mode.
This family is a dramatic improvement on previous offerings and very definitely sets the standard that other products must target. My only negative is that I think the premium of $1.75 for a comparator is rather high (AD9951 to AD9952) while an additional $0.75 is all that is asked for adding automatic frequency sweep (AD9953 to AD9954 with $1.75 for the comparator allowed for.)
The AD9951, AD9952, AD9953 and AD9954 are in production in a thermally-enhanced TQFP-48, priced at $13.75, $15.50, $14.75 and $17.25 respectively all in 1000-piece lots.
Preliminary Data Sheet (AD9954)
Preliminary Data Sheet (AD9953)
Preliminary Data Sheet (AD9952)
Preliminary Data Sheet (AD9951)