acquisitionZONE Products for the week of December 23, 2002


Texas Instruments Says . . .
MSC1210: 24-Bit Data Acquisition System
Delivers Industry's Highest Performance and Integration

Texas Instruments (TI) Incorporated introduced a family of low-noise 24-bit data acquisition system solutions from the company's Burr-Brown product line which offers the industry's highest level of performance and integration. By incorporating high-precision analog and digital processing into a small package, the MSC1210 family is the ideal choice for high-resolution measurement applications in industrial process control, portable instrumentation, weigh scales, smart transmitters and chromatography.

The MSC1210 family integrates a 24-bit delta-sigma analog-to-digital converter (ADC) with an enhanced 8051 processor core, flash memory and a variety of high-performance on-chip peripherals to achieve unparalleled system performance -- all at 4mW power consumption. The integration of the analog and digital cores gives customers the ability to customize the device to meet their specific requirements. It would be much more costly and difficult to achieve the same level of flexibility and performance using multiple devices.

The enhanced 8051 core executes up to three times faster, with lower power, than the standard 8051 core. The MSC1210 family offers a variety of flash memory sizes with pin and function compatibility, thus allowing the customer to freely migrate between devices as their code requirements change.

In terms of analog performance, the MSC1210 family offers the industry's lowest noise performance in a mixed-signal device (75nV). Furthermore, the ADC on the MSC1210 family has a much faster sampling rate than comparable devices.

"Providing an unsurpassed level of high-performance functionality in a single chip, which was traditionally implemented with external circuitry, has positioned the MSC1210 family as the most valuable data conversion system on the market. This device will simplify the design of complex systems and reduce overall component cost," said Robert Schreiber, product line manager for TI's data acquisition system products. "The noise performance of the ADC is better than most standalone ADCs on the market and is significantly better than any comparable mixed-signal device. The enhanced 8051 core, along with the high-performance peripherals, pushes the performance envelope of the digital processing while maintaining analog signal integrity."

The analog features of the MSC1210 family consist of a 24-bit delta sigma ADC, a flexible eight-channel multiplexer, burn-out current sources, selectable buffered input, offset digital-to-analog converter (DAC), programmable gains of up to 128, selectable data output rate, programmable single-cycle settling filter, precision on-chip voltage reference or external differential voltage reference, on-chip temperature sensor, on-chip calibration, low voltage detect and brown-out reset.

The digital features of the MSC1210 family include an enhanced 8051 microcontroller core with dual data pointers, four flash memory size options (4K, 8K, 16K, 32K) -- all with external memory capability as well -- 1.2kbytes of SRAM, 34 I/O lines, an additional 32-bit accumulator/shifter, dual UARTs, three timers/counters, SPI interface with direct memory access and a watchdog timer. The four different sizes of flash memory allow the customer to optimize the memory size to their application and provide an easy migration path to larger memory sizes without having to add external memory, as required in other devices.

analogZONE Says . . .

analogZONE missed the original announcement of this product earlier in the year, possibly because the eye was drawn to the 8051 core that is included in the parts - an immediate turn-off for the analog engineer. But that is a totally undeserved viewpoint and the MSC1210 family represents a genuine increase in the performance of data acquisition systems with little or no compromise on either the analog or digital parts of the system. Earlier attempts to integrate a controller on the same IC as the analog acquisition resulted in excessive levels of noise. Clock management techniques have come a long way in recent years and the performances here are actually better than those obtained a few years ago from a standalone ADC.

The MSC1210 family architecture includes an 8-channel input multiplexer, and 8-bit controlled PGA, a 24-bit ADC and an 8051 controller. Also included are temperature sensing, an on-chip voltage reference, Flash data and program memory, and data SRAM. Peripherals include watchdog timer, low-voltage detect, on-chip power-on reset, brownout reset, three timers/counters, plus an additional 32-bit accumulator, SPI-compatible serial port, dual UARTs and multiple I/O ports. All that is needed for a fully-functional data acquisition system is to add the external sensors and any required filters between the sensors and the system.

The input multiplexer provides for up to 8 differential inputs and it is also possible to switch polarity to negate offset voltages. All channels can also be driven single-ended and current sources are also provided to source or sink current to detect open- or short-circuits on the pins, giving the possibility of detecting extreme sensor faults. An on-chip temperature sensing system using two diodes can also be switched into the buffer amplifier. The buffer amplifier itself can be bypassed which will then mean that the system input impedance would vary with the gain setting of the following PGA, and with the clock rate. Providing constant impedance with the buffer amplifier in circuit does come with two price tags - the input swing is reduced, and the analog quiescent current increases.

The PGA can be set to gains of 1, 2, 4, 8, 16, 32, 64, or 128. Using the gain function correctly will dramatically improve the effective resolution of the following ADC by maximizing the voltage swing applied. Including the PGA on-chip reduces the chances of the inexpert designer from getting it wrong - or using a much higher resolution discrete ADC than is really necessary for the job. The input to the PGA can be offset by up to half the full-scale input range with the ODAC register.

The ADC is a single-loop second-order system using a clock that is related to and derived from the main clock for the processor. Offset and gain calibration is available - which will complete in 14 data periods. The digital filter following the ADC can be set sinc³, sin², or fast which will settle in 3, 2, and 1 conversion cycle with synchronized channel changes: When channels are changed, when in auto-mode, the first two conversions are in the fast mode, then it will switch to sinc², then sinc³ to reduce noise. The very first conversion needs to be discarded.

An on-chip voltage reference is provided - which can, and should, be turned off when an external reference is used in its place. The start-up voltage from the reference is 2.5 V but can be switched to 1.25 V to optimize for lower supply rails.

The 8051 core is an enhanced version with 1.5 to 3 times faster instruction execution speed. The clock can be supplied externally or it can be generated with an internal clock generator using an external crystal or ceramic resonator. The maximum frequency with a resonator is 16 MHz, but an external or crystal source can be up to 18 MHz for supply rails from 2.7 V to 3.6 V, and 33 MHz for supplies between 4.75 V and 5.25 V. Across the complete supply voltage range of 2.7 V to 3.6 V for the digital part of the IC the quiescent is typically 1.4 mA at 1 MHz and 8 mA at 8 MHz. Those increase to 2 mA and 17 mA for supplies from 4.75 V to 5.25 V. The latter would increase to over 50 mA at 30 MHz operation. CMRR and PSRR are both better than 100 dB across the frequency spectrum to 100 kHz.

The data sheet fully characterizes the parts with both 3.0 V and 5.0 V supplies and the worst case power consumption (at highest PGA gain with the buffer amplifier on) for the analog portion of the IC is less than 1 mA at both voltages. The offset error, after calibration, is typically 7.5 ppm of full-scale (FS) at both rails while the gain error is typically 0.002% with a 5-V rail and 0.010% with 3 V.

Four parts are available in the family with the part number extension indicating Flash memory size (for both program and data memory) in binary: The MSC1210Y2 (4 kbyte), the MSC1210Y3 (8 kbyte), the MSC1210Y4 (16 kbyte), and the MSC1210Y5 (32 kbyte.) In all cases the internal scratchpad RAM is 256 byte, the MOVX SRAM is 1024 byte, and external access can be obtained to 64 kbyte program memory and 64 kbyte data memory.

This family will be hugely successful with a lot of the immediate problems in setting up a successful data acquisition system already taken care of in the single part. The applications will be across the board.

All the MSC1210 family is in production in TQFP-64 with the price based on the Flash memory size with 4 kbyte at $8.95, 8 kbyte at $9.50, 16 kbyte at $10.75, and 32 kbyte at $12.25, all in 1000-piece lots.

Data Sheet



acquisitionZONE - audio/videoZONE - greenZONE - hf/rfZONE - i/oZONE - networkZONE - powerZONE - in the ZONE
home

analogZONE
(c) 2002. All rights reserved.