acquisitionZONE Products for the week of October 6, 2003
Analog Devices Inc., a global leader in high-performance semiconductors for signal processing applications, today ushered in a new era for high-speed operational amplifiers with the introduction of a new IC that minimizes two fundamental error sources in amplifier design: voltage noise and harmonic distortion. The AD8099 features a patent-pending advanced circuit architecture that addresses fundamental performance trade-offs inherent in traditional differential input stages. This enables the AD8099 to deliver both extremely low voltage noise (0.95 nV/rt. Hz) and very low distortion (-90 dB at 10 MHz), a breakthrough combination of specifications that no other high-speed op amp on the market can deliver. In addition, the new device provides a 1600-V/us slew rate and a 5-GHz gain bandwidth product at gain of 10. The AD8099 can slew at rates of 600 V/us, down to a gain of 2.
"We have a 40-year track record of helping engineers make their design ideas real by pushing linear technology to new levels of performance. We continue the tradition today," said Lew Counts, ADI fellow and vice president of Linear Products, Analog Devices. "Not only do few op amps have the superior noise and distortion performance of this new op amp, none have this combination at the low gains most often used to drive high-resolution ADCs in data acquisition systems."
New Pin-out and Packaging Enhance Performance and Ease Design Challenges
The AD8099 uses an advanced pin-out to enhance performance and stability
over traditional amplifier pin-outs. The AD8099 is the first operational
amplifier to use this new pin-out to reduce the mutual inductance -- and
resulting distortion products -- caused by the coupling between positive
input and negative supply. Additionally, the amplifier provides two output
pins to reduce feedback parasitics. This simplifies board layout and increases
the stability of the amplifier. The AD8099 is available in a lead frame
chip-scale package (LFCSP). This tiny package reduces lead inductance, provides
better thermal characteristics, and saves board space.
analogZONE Says . . .
For an industry that is really not that old we can be kind of stubborn. A case in point is the now- venerable standard for pin-out in a single-channel op amp. Yes, there have been a few attempts to change it over the years but all that I know of were abandoned. And yes, additional functions have been added to the originally unused pins, but the location of the two inputs, the output and the supply pins have been left inviolate from the day that Dave Fullagar decided that was how the 741 was going to be. The design wins -- of what is now a dime part -- guaranteed that if you were to compete you had to stick to the rules.
Here, Analog Devices is doing two things to the pin-out: The first is one of those "why didn't I think of it things" by them providing two output pins, the second of which is on the input side of the part so that feedback component(s) can be in a sensible location: Eliminating any current load affects and making board layout a decade easier.
The second change is in the chip-scale package (lead-frame CSP, with a thermal slug) version of the part where everything is shifted one pin so that the negative supply pin is now on the output side, greatly reducing the mutual inductance between it and the +ve (non-inverting) input. It's a bold move but the numbers bear out the fact that it works in the distortion department. There seems to be slightly better frequency performance from the SOIC version of the part, but that may just be a fact of CSP life.
The SOIC has standard pin-out, which I see as both good and bad. The good is that there aren't going to be mistakes made by dropping the part into a standard socket. The bad is that designers are going to have a hard time developing circuits initially because they will play with the SOIC version but drop the CSP into the final board - and things may not be exactly the same as the real estate shrinks. Personally, I think that there are so many "alternate" pin activities in the op amp world that the designer who doesn't check out the part he is using deserves to get into trouble. I wish that ADI had been bold enough to just "go for it" with a non-standard SOIC-8 and see what happens: Designers working on 16- and 18-bit designs for applications that truly need them are the most experienced out there, and they deserve the benefits that a non-standard SOIC would give -- it would cut them that little extra slack that they need to get their numbers.
It should be noted that the specifications in the preliminary data sheet are for the CSP and Analog Devices does NOT note that. They told me to expect distortion numbers about 2 dBc worse with the SOIC.
These are 1 nV/rtHz noise parts (with the 1/f noise corner at about 10 kHz) and are extremely suitable for 16 and 18 bit solutions. And the company has not achieved these numbers by throwing a heap of power into the solution, with about 15 mA typical quiescent and an extremely handsome PSRR of -80 dB typical. The parts are voltage-feedback amplifiers and maintain their frequency response performance up to gains of 10, giving some high GBW numbers. They also show decent differential gain and phase numbers but looking at the 0.1 dB flatness curves (the data sheet quotes 150 MHz) it turns out that the 0.1 dB flatness in the SOIC is about 35 MHz for the SOIC and about 28 MHz for the CSP. The low gain (G = 2) slew rate is only 500 V/µs but rises rapidly with gain -- this is a part that wants to be worked hard, and the higher slew rates are much better than the other low-noise op amps that are already out there.
The data sheet gives numbers for both a single +5 V rail and split ±5 V rails with no apparent difference in them. The distortion curves (not published) show 2nd harmonic numbers of better than -100 dBc below 1 MHz and about -95 dBc through 6 MHz before climbing out. The 3rd harmonic shows better than -110 dB through about 4 MHz. The pin-out changes certainly pay off and combined with the noise numbers this part is ideal for 16- and 18-bit applications. There is a premium to pay and although the amplifier would work well in many other applications that premium will keep designers using other parts. An exception might be in frequency applications up to 10 MHz where the distortion performance, by itself, might be the winner. It would be a waste in designs that don't really need 16-bit and higher performance but where the designer is using such parts instead of signal-scaling correctly -- an all too-frequent occurrence.
The company tells me that there will not be any multi-channel parts because of the difficulties of inductance across the die. Also, in shutdown the output impedance goes high so that the use of a MUX might be avoided in multi-channel ADC designs.
As noted, the AS8099 is in the industry-standard pin-out SOIC-8 and the modified pin-out CSP-8. It is sampling now with production expected in November 2003 with a price of $1.98 in 1000-piece lots.